64510c1411
Implement BCD assist builtins for XL and GCC compatibility. GCC compat: ``` unsigned int __builtin_cdtbcd (unsigned int); unsigned int __builtin_cbcdtd (unsigned int); unsigned int __builtin_addg6s (unsigned int, unsigned int); ``` 64BIT XL compat: ``` long long __cdtbcd (long long); long long __cbcdtd (long long); long long __addg6s (long long source1, long long source2) ```
59 lines
2.3 KiB
C
59 lines
2.3 KiB
C
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
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// REQUIRES: powerpc-registered-target
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// RUN: %clang_cc1 -triple powerpc64le-unknown-linux -O2 -target-cpu pwr7 \
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// RUN: -emit-llvm %s -o - | FileCheck %s
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// RUN: %clang_cc1 -triple powerpc64-unknown-aix -O2 -target-cpu pwr7 \
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// RUN: -emit-llvm %s -o - | FileCheck %s
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// RUN: %clang_cc1 -triple powerpc-unknown-aix -O2 -target-cpu pwr7 \
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// RUN: -emit-llvm %s -o - | FileCheck %s
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// CHECK-LABEL: define{{.*}} i64 @cdtbcd_test(i64
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// CHECK: [[CONV:%.*]] = trunc i64 {{.*}} to i32
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// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.ppc.cdtbcd(i32 [[CONV]])
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// CHECK-NEXT: [[CONV1:%.*]] = zext i32 [[TMP0]] to i64
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// CHECK-NEXT: ret i64 [[CONV1]]
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long long cdtbcd_test(long long ll) {
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return __builtin_cdtbcd (ll);
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}
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// CHECK-LABEL: define{{.*}} i32 @cdtbcd_test_ui(i32
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// CHECK: [[TMP0:%.*]] = tail call i32 @llvm.ppc.cdtbcd(i32
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// CHECK-NEXT: ret i32 [[TMP0]]
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unsigned int cdtbcd_test_ui(unsigned int ui) {
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return __builtin_cdtbcd (ui);
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}
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// CHECK-LABEL: define{{.*}} i64 @cbcdtd_test(i64
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// CHECK: [[CONV:%.*]] = trunc i64 {{.*}} to i32
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// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.ppc.cbcdtd(i32 [[CONV]])
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// CHECK-NEXT: [[CONV1:%.*]] = zext i32 [[TMP0]] to i64
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// CHECK-NEXT: ret i64 [[CONV1]]
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long long cbcdtd_test(long long ll) {
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return __builtin_cbcdtd (ll);
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}
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// CHECK-LABEL: define{{.*}} i32 @cbcdtd_test_ui(i32
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// CHECK: [[TMP0:%.*]] = tail call i32 @llvm.ppc.cbcdtd(i32
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// CHECK-NEXT: ret i32 [[TMP0]]
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unsigned int cbcdtd_test_ui(unsigned int ui) {
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return __builtin_cbcdtd (ui);
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}
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// CHECK-LABEL: define{{.*}} i64 @addg6s_test(i64
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// CHECK: [[CONV:%.*]] = trunc i64 {{.*}} to i32
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// CHECK-NEXT: [[CONV1:%.*]] = trunc i64 {{.*}} to i32
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// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.ppc.addg6s(i32 [[CONV]], i32 [[CONV1]])
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// CHECK-NEXT: [[CONV2:%.*]] = zext i32 [[TMP0]] to i64
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// CHECK-NEXT: ret i64 [[CONV2]]
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//
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long long addg6s_test(long long ll, long long ll2) {
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return __builtin_addg6s (ll, ll2);
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}
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// CHECK-LABEL: define{{.*}} i32 @addg6s_test_ui(i32
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// CHECK: [[TMP0:%.*]] = tail call i32 @llvm.ppc.addg6s(i32 {{.*}}, i32
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// CHECK-NEXT: ret i32 [[TMP0]]
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unsigned int addg6s_test_ui(unsigned int ui, unsigned int ui2) {
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return __builtin_addg6s (ui, ui2);
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}
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