44b020a381
Add support for using a thread-local variable with a specified offset for holding the stack guard canary value. This supports both 32- and 64- bit PowerPC targets. This mirrors changes from #108942 but targeting PowerPC instead of RISCV. Because both of these PRs modify the same driver functions, this series is stack on top of the RISC-V one. --------- Signed-off-by: Keith Packard <keithp@keithp.com>
50 lines
3.1 KiB
C
50 lines
3.1 KiB
C
// RUN: %clang_cc1 -mstack-protector-guard=sysreg -triple x86_64-linux-gnu \
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// RUN: -mstack-protector-guard-offset=1024 -emit-llvm %s -o - | FileCheck %s
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// RUN: %clang_cc1 -mstack-protector-guard=sysreg -triple powerpc64le-linux-gnu \
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// RUN: -mstack-protector-guard-offset=1024 -emit-llvm %s -o - | FileCheck %s
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// RUN: %clang_cc1 -mstack-protector-guard=sysreg -triple arm-linux-gnueabi \
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// RUN: -mstack-protector-guard-offset=1024 -emit-llvm %s -o - | FileCheck %s
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// RUN: %clang_cc1 -mstack-protector-guard=sysreg -triple thumbv7-linux-gnueabi \
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// RUN: -mstack-protector-guard-offset=1024 -emit-llvm %s -o - | FileCheck %s
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// RUN: %clang_cc1 -mstack-protector-guard=sysreg -triple aarch64-linux-gnu \
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// RUN: -mstack-protector-guard-offset=1024 -mstack-protector-guard-reg=sp_el0 \
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// RUN: -emit-llvm %s -o - | FileCheck %s --check-prefix=AARCH64
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// RUN: %clang_cc1 -mstack-protector-guard=tls -triple riscv64-unknown-elf \
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// RUN: -mstack-protector-guard-offset=44 -mstack-protector-guard-reg=tp \
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// RUN: -emit-llvm %s -o - | FileCheck %s --check-prefix=RISCV
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// RUN: %clang_cc1 -mstack-protector-guard=tls -triple powerpc64-unknown-elf \
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// RUN: -mstack-protector-guard-offset=52 -mstack-protector-guard-reg=r13 \
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// RUN: -emit-llvm %s -o - | FileCheck %s --check-prefix=POWERPC64
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// RUN: %clang_cc1 -mstack-protector-guard=tls -triple ppc32-unknown-elf \
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// RUN: -mstack-protector-guard-offset=16 -mstack-protector-guard-reg=r2 \
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// RUN: -emit-llvm %s -o - | FileCheck %s --check-prefix=POWERPC32
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void foo(int*);
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void bar(int x) {
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int baz[x];
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foo(baz);
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}
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// CHECK: !llvm.module.flags = !{{{.*}}[[ATTR1:![0-9]+]], [[ATTR2:![0-9]+]]}
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// CHECK: [[ATTR1]] = !{i32 1, !"stack-protector-guard", !"sysreg"}
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// CHECK: [[ATTR2]] = !{i32 1, !"stack-protector-guard-offset", i32 1024}
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// AARCH64: !llvm.module.flags = !{{{.*}}[[ATTR1:![0-9]+]], [[ATTR2:![0-9]+]], [[ATTR3:![0-9]+]]}
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// AARCH64: [[ATTR1]] = !{i32 1, !"stack-protector-guard", !"sysreg"}
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// AARCH64: [[ATTR2]] = !{i32 1, !"stack-protector-guard-reg", !"sp_el0"}
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// AARCH64: [[ATTR3]] = !{i32 1, !"stack-protector-guard-offset", i32 1024}
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// RISCV: !llvm.module.flags = !{{{.*}}[[ATTR1:![0-9]+]], [[ATTR2:![0-9]+]], [[ATTR3:![0-9]+]], [[ATTR4:![0-9]+]]}
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// RISCV: [[ATTR1]] = !{i32 1, !"stack-protector-guard", !"tls"}
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// RISCV: [[ATTR2]] = !{i32 1, !"stack-protector-guard-reg", !"tp"}
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// RISCV: [[ATTR3]] = !{i32 1, !"stack-protector-guard-offset", i32 44}
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// POWERPC64: !llvm.module.flags = !{{{.*}}[[ATTR1:![0-9]+]], [[ATTR2:![0-9]+]], [[ATTR3:![0-9]+]], [[ATTR4:![0-9]+]]}
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// POWERPC64: [[ATTR2]] = !{i32 1, !"stack-protector-guard", !"tls"}
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// POWERPC64: [[ATTR3]] = !{i32 1, !"stack-protector-guard-reg", !"r13"}
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// POWERPC64: [[ATTR4]] = !{i32 1, !"stack-protector-guard-offset", i32 52}
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// POWERPC32: !llvm.module.flags = !{{{.*}}[[ATTR1:![0-9]+]], [[ATTR2:![0-9]+]], [[ATTR3:![0-9]+]], [[ATTR4:![0-9]+]]}
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// POWERPC32: [[ATTR2]] = !{i32 1, !"stack-protector-guard", !"tls"}
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// POWERPC32: [[ATTR3]] = !{i32 1, !"stack-protector-guard-reg", !"r2"}
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// POWERPC32: [[ATTR4]] = !{i32 1, !"stack-protector-guard-offset", i32 16}
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