4f188ef89c
This is a follow-on to https://reviews.llvm.org/D134073. It renames a few fields to have consistent names, as well as renaming operands to match the field names. The encoder behavior is unchanged by this cleanup, but a few instructions were previously being disassembled incorrectly, and have been corrected by this change. All of the affected instructions were missing disassembly tests, which are now added. Differential Revision: https://reviews.llvm.org/D134185
80 lines
2.7 KiB
TableGen
80 lines
2.7 KiB
TableGen
//===-- AVR.td - Describe the AVR Target Machine ----------*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===---------------------------------------------------------------------===//
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// This is the top level entry point for the AVR target.
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//===---------------------------------------------------------------------===//
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//===---------------------------------------------------------------------===//
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// Target-independent interfaces which we are implementing
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//===---------------------------------------------------------------------===//
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include "llvm/Target/Target.td"
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//===---------------------------------------------------------------------===//
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// AVR Device Definitions
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//===---------------------------------------------------------------------===//
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include "AVRDevices.td"
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//===---------------------------------------------------------------------===//
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// Register File Description
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//===---------------------------------------------------------------------===//
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include "AVRRegisterInfo.td"
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//===---------------------------------------------------------------------===//
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// Instruction Descriptions
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//===---------------------------------------------------------------------===//
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include "AVRInstrInfo.td"
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def AVRInstrInfo : InstrInfo;
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//===---------------------------------------------------------------------===//
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// Calling Conventions
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//===---------------------------------------------------------------------===//
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include "AVRCallingConv.td"
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//===---------------------------------------------------------------------===//
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// Assembly Printers
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//===---------------------------------------------------------------------===//
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def AVRAsmWriter : AsmWriter {
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string AsmWriterClassName = "InstPrinter";
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bit isMCAsmWriter = 1;
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}
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//===---------------------------------------------------------------------===//
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// Assembly Parsers
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//===---------------------------------------------------------------------===//
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def AVRAsmParser : AsmParser {
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let ShouldEmitMatchRegisterName = 1;
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let ShouldEmitMatchRegisterAltName = 1;
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}
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def AVRAsmParserVariant : AsmParserVariant {
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int Variant = 0;
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// Recognize hard coded registers.
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string RegisterPrefix = "$";
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string TokenizingCharacters = "+";
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}
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//===---------------------------------------------------------------------===//
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// Target Declaration
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//===---------------------------------------------------------------------===//
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def AVR : Target {
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let InstructionSet = AVRInstrInfo;
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let AssemblyWriters = [AVRAsmWriter];
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let AssemblyParsers = [AVRAsmParser];
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let AssemblyParserVariants = [AVRAsmParserVariant];
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}
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