llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.h
Shengchen Kan 3f1e9468f6 [X86][MC][bolt] Share code between encoding optimization and assembler relaxation, NFCI
PUSH[16|32|64]i[8|32] are not arithmetic instructions, so I renamed the
functions.

Reviewed By: Amir

Differential Revision: https://reviews.llvm.org/D151028
2023-05-21 09:31:50 +08:00

31 lines
1.2 KiB
C++

//===-- X86EncodingOptimization.h - X86 Encoding optimization ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the declarations of the X86 encoding optimization
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_X86_X86ENCODINGOPTIMIZATION_H
#define LLVM_LIB_TARGET_X86_X86ENCODINGOPTIMIZATION_H
namespace llvm {
class MCInst;
class MCInstrDesc;
namespace X86 {
bool optimizeInstFromVEX3ToVEX2(MCInst &MI, const MCInstrDesc &Desc);
bool optimizeShiftRotateWithImmediateOne(MCInst &MI);
bool optimizeVPCMPWithImmediateOneOrSix(MCInst &MI);
bool optimizeMOVSX(MCInst &MI);
bool optimizeINCDEC(MCInst &MI, bool In64BitMode);
bool optimizeMOV(MCInst &MI, bool In64BitMode);
bool optimizeToFixedRegisterOrShortImmediateForm(MCInst &MI);
unsigned getOpcodeForShortImmediateForm(unsigned Opcode);
unsigned getOpcodeForLongImmediateForm(unsigned Opcode);
} // namespace X86
} // namespace llvm
#endif