b9ea7327c0
For now X86InstrInfo.td has many definitions for some instrs and patterns which I think should not exist here, extract them and move to other files. It will be more clear to me that X86InstrInfo just define some X86 specific properties and would not include detailed instrs definition. Reviewed By: skan Differential Revision: https://reviews.llvm.org/D144244
63 lines
2.0 KiB
TableGen
63 lines
2.0 KiB
TableGen
//===-- X86InstrSVM.td - SVM Instruction Set Extension -----*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes the instructions that make up the AMD SVM instruction
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// set.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// SVM instructions
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let SchedRW = [WriteSystem] in {
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// 0F 01 D9
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def VMMCALL : I<0x01, MRM_D9, (outs), (ins), "vmmcall", []>, TB;
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// 0F 01 DC
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def STGI : I<0x01, MRM_DC, (outs), (ins), "stgi", []>, TB;
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// 0F 01 DD
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def CLGI : I<0x01, MRM_DD, (outs), (ins), "clgi", []>, TB;
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// 0F 01 DE
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let Uses = [EAX] in
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def SKINIT : I<0x01, MRM_DE, (outs), (ins), "skinit", []>, TB;
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// 0F 01 D8
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let Uses = [EAX] in
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def VMRUN32 : I<0x01, MRM_D8, (outs), (ins), "vmrun", []>, TB,
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Requires<[Not64BitMode]>;
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let Uses = [RAX] in
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def VMRUN64 : I<0x01, MRM_D8, (outs), (ins), "vmrun", []>, TB,
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Requires<[In64BitMode]>;
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// 0F 01 DA
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let Uses = [EAX] in
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def VMLOAD32 : I<0x01, MRM_DA, (outs), (ins), "vmload", []>, TB,
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Requires<[Not64BitMode]>;
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let Uses = [RAX] in
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def VMLOAD64 : I<0x01, MRM_DA, (outs), (ins), "vmload", []>, TB,
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Requires<[In64BitMode]>;
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// 0F 01 DB
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let Uses = [EAX] in
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def VMSAVE32 : I<0x01, MRM_DB, (outs), (ins), "vmsave", []>, TB,
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Requires<[Not64BitMode]>;
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let Uses = [RAX] in
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def VMSAVE64 : I<0x01, MRM_DB, (outs), (ins), "vmsave", []>, TB,
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Requires<[In64BitMode]>;
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// 0F 01 DF
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let Uses = [EAX, ECX] in
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def INVLPGA32 : I<0x01, MRM_DF, (outs), (ins),
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"invlpga", []>, TB, Requires<[Not64BitMode]>;
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let Uses = [RAX, ECX] in
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def INVLPGA64 : I<0x01, MRM_DF, (outs), (ins),
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"invlpga", []>, TB, Requires<[In64BitMode]>;
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} // SchedRW
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