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llvm-project/llvm/test/Analysis/CostModel/RISCV/insertelement.ll
Sergey Kachkov 3d7df0a547
[RISCV][CostModel] Estimate cost of Extract/InsertElement with non-constant index when vector instructions are not available (#67334) 
This patch fixes the compilation time issue of matrix-types-spec test
from test-suite.

Reproduction of the problem:
```
clang++ -DNDEBUG --target=riscv64-linux-gnu --sysroot=<sysroot path> --gcc-toolchain=<gcc path> -O2 -fenable-matrix <test-suite-path>/SingleSource/UnitTests/matrix-types-spec.cpp
```

On my machine, compilation takes 50.44s. In comparison, the same test
with RVV (-march=rv64gcv) compiles in 3.06s, and for x86-64 target it
takes 1.71s. It turns out that the main issue is unrolling of loop in
multiplySpec function, that has extractelements with non-constant index:
```
for.body9.i:                                      ; preds = %for.body9.i, %for.cond6.preheader.i
  %indvars.iv.i92 = phi i64 [ 0, %for.cond6.preheader.i ], [ %indvars.iv.next.i93, %for.body9.i ]
  %Elt.033.i = phi double [ 0.000000e+00, %for.cond6.preheader.i ], [ %80, %for.body9.i ]
  %77 = mul nuw nsw i64 %indvars.iv.i92, 25
  %78 = add nuw nsw i64 %77, %indvars.iv39.i91
  %matrixext.i = extractelement <475 x double> %62, i64 %78
  %79 = add nuw nsw i64 %indvars.iv.i92, %74
  %matrixext13.i = extractelement <209 x double> %73, i64 %79
  %80 = tail call double @llvm.fmuladd.f64(double %matrixext.i, double %matrixext13.i, double %Elt.033.i)
  %indvars.iv.next.i93 = add nuw nsw i64 %indvars.iv.i92, 1
  %exitcond.not.i94 = icmp eq i64 %indvars.iv.next.i93, 19
  br i1 %exitcond.not.i94, label %for.cond.cleanup8.i, label %for.body9.i, !llvm.loop !21
```

When RVV is supported, extractelement/insertelement with non-constant
index can be lowered quite efficiently with vslidedown/vslideup;
otherwise it's lowered via stack memory operations, i.e. for
extractelement each vector element is stored on stack and then the
needed element is loaded back; for insertelement is stores all vector
elements, rewrites the required element value and then loads vector
back. Currently the cost of such expensive operation is estimated as
zero, so loop unroll processes the loop more aggresively. The proper
estimation of cost (in a way like in X86 target) prohibits unrolling of
this loop and fixes compilation time (2.77s on my machine).
2023-09-27 13:12:42 +03:00

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; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 3
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=riscv32 -mattr=+f,+d,+zfh < %s | FileCheck %s --check-prefixes=RV32
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=riscv64 -mattr=+f,+d,+zfh < %s | FileCheck %s --check-prefixes=RV64
define void @insertelement_int(i32 %x) {
; RV32-LABEL: 'insertelement_int'
; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2i8 = insertelement <2 x i8> undef, i8 undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v4i8 = insertelement <4 x i8> undef, i8 undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v8i8 = insertelement <8 x i8> undef, i8 undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v16i8 = insertelement <16 x i8> undef, i8 undef, i32 %x
; RV32-NEXT: Cost Model: Invalid cost for instruction: %nxv16i8 = insertelement <vscale x 16 x i8> undef, i8 undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2i16 = insertelement <2 x i16> undef, i16 undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v4i16 = insertelement <4 x i16> undef, i16 undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v8i16 = insertelement <8 x i16> undef, i16 undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v16i16 = insertelement <16 x i16> undef, i16 undef, i32 %x
; RV32-NEXT: Cost Model: Invalid cost for instruction: %nxv16i16 = insertelement <vscale x 16 x i16> undef, i16 undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2i32 = insertelement <2 x i32> undef, i32 undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v4i32 = insertelement <4 x i32> undef, i32 undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v8i32 = insertelement <8 x i32> undef, i32 undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v16i32 = insertelement <16 x i32> undef, i32 undef, i32 %x
; RV32-NEXT: Cost Model: Invalid cost for instruction: %nxv16i32 = insertelement <vscale x 16 x i32> undef, i32 undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v2i64 = insertelement <2 x i64> undef, i64 undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v4i64 = insertelement <4 x i64> undef, i64 undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v8i64 = insertelement <8 x i64> undef, i64 undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 66 for instruction: %v16i64 = insertelement <16 x i64> undef, i64 undef, i32 %x
; RV32-NEXT: Cost Model: Invalid cost for instruction: %nxv16i64 = insertelement <vscale x 16 x i64> undef, i64 undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
; RV64-LABEL: 'insertelement_int'
; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2i8 = insertelement <2 x i8> undef, i8 undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v4i8 = insertelement <4 x i8> undef, i8 undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v8i8 = insertelement <8 x i8> undef, i8 undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v16i8 = insertelement <16 x i8> undef, i8 undef, i32 %x
; RV64-NEXT: Cost Model: Invalid cost for instruction: %nxv16i8 = insertelement <vscale x 16 x i8> undef, i8 undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2i16 = insertelement <2 x i16> undef, i16 undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v4i16 = insertelement <4 x i16> undef, i16 undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v8i16 = insertelement <8 x i16> undef, i16 undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v16i16 = insertelement <16 x i16> undef, i16 undef, i32 %x
; RV64-NEXT: Cost Model: Invalid cost for instruction: %nxv16i16 = insertelement <vscale x 16 x i16> undef, i16 undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2i32 = insertelement <2 x i32> undef, i32 undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v4i32 = insertelement <4 x i32> undef, i32 undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v8i32 = insertelement <8 x i32> undef, i32 undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v16i32 = insertelement <16 x i32> undef, i32 undef, i32 %x
; RV64-NEXT: Cost Model: Invalid cost for instruction: %nxv16i32 = insertelement <vscale x 16 x i32> undef, i32 undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2i64 = insertelement <2 x i64> undef, i64 undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v4i64 = insertelement <4 x i64> undef, i64 undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v8i64 = insertelement <8 x i64> undef, i64 undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v16i64 = insertelement <16 x i64> undef, i64 undef, i32 %x
; RV64-NEXT: Cost Model: Invalid cost for instruction: %nxv16i64 = insertelement <vscale x 16 x i64> undef, i64 undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
%v2i8 = insertelement <2 x i8> undef, i8 undef, i32 %x
%v4i8 = insertelement <4 x i8> undef, i8 undef, i32 %x
%v8i8 = insertelement <8 x i8> undef, i8 undef, i32 %x
%v16i8 = insertelement <16 x i8> undef, i8 undef, i32 %x
%nxv16i8 = insertelement <vscale x 16 x i8> undef, i8 undef, i32 %x
%v2i16 = insertelement <2 x i16> undef, i16 undef, i32 %x
%v4i16 = insertelement <4 x i16> undef, i16 undef, i32 %x
%v8i16 = insertelement <8 x i16> undef, i16 undef, i32 %x
%v16i16 = insertelement <16 x i16> undef, i16 undef, i32 %x
%nxv16i16 = insertelement <vscale x 16 x i16> undef, i16 undef, i32 %x
%v2i32 = insertelement <2 x i32> undef, i32 undef, i32 %x
%v4i32 = insertelement <4 x i32> undef, i32 undef, i32 %x
%v8i32 = insertelement <8 x i32> undef, i32 undef, i32 %x
%v16i32 = insertelement <16 x i32> undef, i32 undef, i32 %x
%nxv16i32 = insertelement <vscale x 16 x i32> undef, i32 undef, i32 %x
%v2i64 = insertelement <2 x i64> undef, i64 undef, i32 %x
%v4i64 = insertelement <4 x i64> undef, i64 undef, i32 %x
%v8i64 = insertelement <8 x i64> undef, i64 undef, i32 %x
%v16i64 = insertelement <16 x i64> undef, i64 undef, i32 %x
%nxv16i64 = insertelement <vscale x 16 x i64> undef, i64 undef, i32 %x
ret void
}
define void @insertelement_fp(i32 %x) {
; RV32-LABEL: 'insertelement_fp'
; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f16 = insertelement <2 x half> undef, half undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v4f16 = insertelement <4 x half> undef, half undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v8f16 = insertelement <8 x half> undef, half undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v16f16 = insertelement <16 x half> undef, half undef, i32 %x
; RV32-NEXT: Cost Model: Invalid cost for instruction: %nxv16f16 = insertelement <vscale x 16 x half> undef, half undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f32 = insertelement <2 x float> undef, float undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v4f32 = insertelement <4 x float> undef, float undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v8f32 = insertelement <8 x float> undef, float undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v16f32 = insertelement <16 x float> undef, float undef, i32 %x
; RV32-NEXT: Cost Model: Invalid cost for instruction: %nxv16f32 = insertelement <vscale x 16 x float> undef, float undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f64 = insertelement <2 x double> undef, double undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v4f64 = insertelement <4 x double> undef, double undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v8f64 = insertelement <8 x double> undef, double undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v16f64 = insertelement <16 x double> undef, double undef, i32 %x
; RV32-NEXT: Cost Model: Invalid cost for instruction: %nxv16f64 = insertelement <vscale x 16 x double> undef, double undef, i32 %x
; RV32-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
; RV64-LABEL: 'insertelement_fp'
; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f16 = insertelement <2 x half> undef, half undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v4f16 = insertelement <4 x half> undef, half undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v8f16 = insertelement <8 x half> undef, half undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v16f16 = insertelement <16 x half> undef, half undef, i32 %x
; RV64-NEXT: Cost Model: Invalid cost for instruction: %nxv16f16 = insertelement <vscale x 16 x half> undef, half undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f32 = insertelement <2 x float> undef, float undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v4f32 = insertelement <4 x float> undef, float undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v8f32 = insertelement <8 x float> undef, float undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v16f32 = insertelement <16 x float> undef, float undef, i32 %x
; RV64-NEXT: Cost Model: Invalid cost for instruction: %nxv16f32 = insertelement <vscale x 16 x float> undef, float undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f64 = insertelement <2 x double> undef, double undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v4f64 = insertelement <4 x double> undef, double undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v8f64 = insertelement <8 x double> undef, double undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v16f64 = insertelement <16 x double> undef, double undef, i32 %x
; RV64-NEXT: Cost Model: Invalid cost for instruction: %nxv16f64 = insertelement <vscale x 16 x double> undef, double undef, i32 %x
; RV64-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
%v2f16 = insertelement <2 x half> undef, half undef, i32 %x
%v4f16 = insertelement <4 x half> undef, half undef, i32 %x
%v8f16 = insertelement <8 x half> undef, half undef, i32 %x
%v16f16 = insertelement <16 x half> undef, half undef, i32 %x
%nxv16f16 = insertelement <vscale x 16 x half> undef, half undef, i32 %x
%v2f32 = insertelement <2 x float> undef, float undef, i32 %x
%v4f32 = insertelement <4 x float> undef, float undef, i32 %x
%v8f32 = insertelement <8 x float> undef, float undef, i32 %x
%v16f32 = insertelement <16 x float> undef, float undef, i32 %x
%nxv16f32 = insertelement <vscale x 16 x float> undef, float undef, i32 %x
%v2f64 = insertelement <2 x double> undef, double undef, i32 %x
%v4f64 = insertelement <4 x double> undef, double undef, i32 %x
%v8f64 = insertelement <8 x double> undef, double undef, i32 %x
%v16f64 = insertelement <16 x double> undef, double undef, i32 %x
%nxv16f64 = insertelement <vscale x 16 x double> undef, double undef, i32 %x
ret void
}
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