4a00c84fbb
Previously instruction selection failed to generate PRFM instructions with register offsets because `AArch64ISD::PREFETCH` is not a `MemSDNode`.
148 lines
4.5 KiB
LLVM
148 lines
4.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=aarch64 < %s | FileCheck %s
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define void @imm9(ptr %object) {
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; CHECK-LABEL: imm9:
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; CHECK: // %bb.0:
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; CHECK-NEXT: prfum pldl1keep, [x0, #7]
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; CHECK-NEXT: ret
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%incdec.ptr = getelementptr inbounds i8, ptr %object, i64 7
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call void @llvm.prefetch.p0(ptr %incdec.ptr, i32 0, i32 3, i32 1)
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ret void
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}
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define void @imm9_max(ptr %object) {
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; CHECK-LABEL: imm9_max:
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; CHECK: // %bb.0:
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; CHECK-NEXT: prfum pldl1keep, [x0, #255]
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; CHECK-NEXT: ret
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%incdec.ptr = getelementptr inbounds i8, ptr %object, i64 255
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call void @llvm.prefetch.p0(ptr %incdec.ptr, i32 0, i32 3, i32 1)
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ret void
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}
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define void @imm9_above_max(ptr %object) {
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; CHECK-LABEL: imm9_above_max:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add x8, x0, #257
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; CHECK-NEXT: prfm pldl1keep, [x8]
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; CHECK-NEXT: ret
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%incdec.ptr = getelementptr inbounds i8, ptr %object, i64 257 ; 256 would use the imm12 mode
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call void @llvm.prefetch.p0(ptr %incdec.ptr, i32 0, i32 3, i32 1)
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ret void
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}
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define void @imm9_min(ptr %object) {
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; CHECK-LABEL: imm9_min:
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; CHECK: // %bb.0:
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; CHECK-NEXT: prfum pldl1keep, [x0, #-256]
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; CHECK-NEXT: ret
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%incdec.ptr = getelementptr inbounds i8, ptr %object, i64 -256
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call void @llvm.prefetch.p0(ptr %incdec.ptr, i32 0, i32 3, i32 1)
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ret void
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}
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define void @imm9_below_min(ptr %object) {
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; CHECK-LABEL: imm9_below_min:
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; CHECK: // %bb.0:
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; CHECK-NEXT: sub x8, x0, #257
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; CHECK-NEXT: prfm pldl1keep, [x8]
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; CHECK-NEXT: ret
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%incdec.ptr = getelementptr inbounds i8, ptr %object, i64 -257
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call void @llvm.prefetch.p0(ptr %incdec.ptr, i32 0, i32 3, i32 1)
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ret void
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}
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define void @imm12(ptr %object) {
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; CHECK-LABEL: imm12:
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; CHECK: // %bb.0:
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; CHECK-NEXT: prfm pldl1keep, [x0, #8]
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; CHECK-NEXT: ret
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%incdec.ptr = getelementptr inbounds i64, ptr %object, i64 1
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call void @llvm.prefetch.p0(ptr %incdec.ptr, i32 0, i32 3, i32 1)
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ret void
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}
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define void @imm12_max(ptr %object) {
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; CHECK-LABEL: imm12_max:
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; CHECK: // %bb.0:
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; CHECK-NEXT: prfm pldl1keep, [x0, #32760]
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; CHECK-NEXT: ret
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%incdec.ptr = getelementptr inbounds i64, ptr %object, i64 4095
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call void @llvm.prefetch.p0(ptr %incdec.ptr, i32 0, i32 3, i32 1)
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ret void
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}
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define void @imm12_above_max(ptr %object) {
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; CHECK-LABEL: imm12_above_max:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #32768 // =0x8000
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; CHECK-NEXT: prfm pldl1keep, [x0, x8]
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; CHECK-NEXT: ret
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%incdec.ptr = getelementptr inbounds i64, ptr %object, i64 4096
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call void @llvm.prefetch.p0(ptr %incdec.ptr, i32 0, i32 3, i32 1)
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ret void
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}
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define void @reg(ptr %object, i64 %a) {
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; CHECK-LABEL: reg:
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; CHECK: // %bb.0:
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; CHECK-NEXT: prfm pldl1keep, [x0, x1]
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; CHECK-NEXT: ret
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%incdec.ptr = getelementptr inbounds i8, ptr %object, i64 %a
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call void @llvm.prefetch.p0(ptr %incdec.ptr, i32 0, i32 3, i32 1)
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ret void
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}
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define void @reg_shift(ptr %object, i64 %a) {
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; CHECK-LABEL: reg_shift:
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; CHECK: // %bb.0:
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; CHECK-NEXT: prfm pldl1keep, [x0, x1, lsl #3]
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; CHECK-NEXT: ret
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%incdec.ptr = getelementptr inbounds i64, ptr %object, i64 %a
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call void @llvm.prefetch.p0(ptr %incdec.ptr, i32 0, i32 3, i32 1)
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ret void
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}
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define void @reg_sext(ptr %object, i32 %a) {
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; CHECK-LABEL: reg_sext:
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; CHECK: // %bb.0:
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; CHECK-NEXT: prfm pldl1keep, [x0, w1, sxtw]
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; CHECK-NEXT: ret
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%incdec.ptr = getelementptr inbounds i8, ptr %object, i32 %a
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call void @llvm.prefetch.p0(ptr %incdec.ptr, i32 0, i32 3, i32 1)
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ret void
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}
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define void @reg_sext_shift(ptr %object, i32 %a) {
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; CHECK-LABEL: reg_sext_shift:
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; CHECK: // %bb.0:
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; CHECK-NEXT: prfm pldl1keep, [x0, w1, sxtw #3]
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; CHECK-NEXT: ret
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%incdec.ptr = getelementptr inbounds i64, ptr %object, i32 %a
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call void @llvm.prefetch.p0(ptr %incdec.ptr, i32 0, i32 3, i32 1)
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ret void
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}
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define void @reg_zext(ptr %object, i32 %a) {
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; CHECK-LABEL: reg_zext:
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; CHECK: // %bb.0:
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; CHECK-NEXT: prfm pldl1keep, [x0, w1, uxtw]
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; CHECK-NEXT: ret
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%a.zext = zext i32 %a to i64
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%incdec.ptr = getelementptr inbounds i8, ptr %object, i64 %a.zext
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call void @llvm.prefetch.p0(ptr %incdec.ptr, i32 0, i32 3, i32 1)
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ret void
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}
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define void @reg_zext_shift(ptr %object, i32 %a) {
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; CHECK-LABEL: reg_zext_shift:
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; CHECK: // %bb.0:
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; CHECK-NEXT: prfm pldl1keep, [x0, w1, uxtw #3]
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; CHECK-NEXT: ret
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%a.zext = zext i32 %a to i64
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%incdec.ptr = getelementptr inbounds i64, ptr %object, i64 %a.zext
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call void @llvm.prefetch.p0(ptr %incdec.ptr, i32 0, i32 3, i32 1)
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ret void
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}
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