
Add support for the new SHF_AARCH64_PURECODE ELF section flag: https://github.com/ARM-software/abi-aa/pull/304 The general implementation follows the existing one for ARM targets. Generating object files with the `SHF_AARCH64_PURECODE` flag set is enabled by the `+execute-only` target feature. Related PRs: * Clang: https://github.com/llvm/llvm-project/pull/125688 * LLD: https://github.com/llvm/llvm-project/pull/125689
40 lines
1.0 KiB
LLVM
40 lines
1.0 KiB
LLVM
; RUN: llc -mtriple=aarch64 -mattr=+execute-only %s -o - | FileCheck %s
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$test_comdat = comdat any
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; CHECK: .section .text,"axy",@progbits,unique,0
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; CHECK-NOT: .section
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; CHECK-NOT: .text
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; CHECK: .globl test_section_for_global
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; CHECK: .type test_section_for_global,@function
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define void @test_section_for_global() {
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entry:
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ret void
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}
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; CHECK: .section .text.test_comdat,"axGy",@progbits,test_comdat,comdat,unique,0
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; CHECK-NOT: .section
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; CHECK-NOT: .text
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; CHECK: .weak test_comdat
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; CHECK: .type test_comdat,@function
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define linkonce_odr void @test_comdat() comdat {
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entry:
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ret void
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}
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; CHECK: .section .test,"axy",@progbits
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; CHECK-NOT: .section
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; CHECK-NOT: .text
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; CHECK: .globl test_explicit_section_for_global
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; CHECK: .type test_explicit_section_for_global,@function
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define void @test_explicit_section_for_global() section ".test" {
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entry:
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ret void
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}
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; CHECK: .rodata,"a",@progbits
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; CHECK-NOT: .section
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; CHECK-NOT: .text
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; CHECK: .globl test_rodata
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@test_rodata = constant i32 0, align 4
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