d39b4ce3ce
Using "eabi" for aarch64 targets is a common mistake and warned by Clang Driver. We want to avoid it elsewhere as well. Just use the common "aarch64" without other triple components.
133 lines
3.6 KiB
LLVM
133 lines
3.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16,+no-zcz-fp | FileCheck %s --check-prefixes=CHECK-FP16,CHECK-NOZCZ
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; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16,+zcz | FileCheck %s --check-prefixes=CHECK-FP16,CHECK-ZCZ
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; RUN: llc < %s -mtriple=aarch64 -mattr=-fullfp16 | FileCheck %s --check-prefixes=CHECK-NOFP16
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define half @Const0() {
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; CHECK-NOZCZ-LABEL: Const0:
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; CHECK-NOZCZ: // %bb.0: // %entry
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; CHECK-NOZCZ-NEXT: fmov h0, wzr
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; CHECK-NOZCZ-NEXT: ret
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;
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; CHECK-ZCZ-LABEL: Const0:
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; CHECK-ZCZ: // %bb.0: // %entry
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; CHECK-ZCZ-NEXT: movi d0, #0000000000000000
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; CHECK-ZCZ-NEXT: ret
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;
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; CHECK-NOFP16-LABEL: Const0:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: movi d0, #0000000000000000
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; CHECK-NOFP16-NEXT: ret
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entry:
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ret half 0xH0000
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}
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define half @Const1() {
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; CHECK-FP16-LABEL: Const1:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: fmov h0, #1.00000000
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; CHECK-FP16-NEXT: ret
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;
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; CHECK-NOFP16-LABEL: Const1:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: adrp x8, .LCPI1_0
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; CHECK-NOFP16-NEXT: ldr h0, [x8, :lo12:.LCPI1_0]
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; CHECK-NOFP16-NEXT: ret
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entry:
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ret half 0xH3C00
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}
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define half @Const2() {
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; CHECK-FP16-LABEL: Const2:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: fmov h0, #0.12500000
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; CHECK-FP16-NEXT: ret
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;
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; CHECK-NOFP16-LABEL: Const2:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: adrp x8, .LCPI2_0
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; CHECK-NOFP16-NEXT: ldr h0, [x8, :lo12:.LCPI2_0]
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; CHECK-NOFP16-NEXT: ret
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entry:
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ret half 0xH3000
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}
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define half @Const3() {
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; CHECK-FP16-LABEL: Const3:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: fmov h0, #30.00000000
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; CHECK-FP16-NEXT: ret
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;
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; CHECK-NOFP16-LABEL: Const3:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: adrp x8, .LCPI3_0
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; CHECK-NOFP16-NEXT: ldr h0, [x8, :lo12:.LCPI3_0]
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; CHECK-NOFP16-NEXT: ret
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entry:
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ret half 0xH4F80
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}
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define half @Const4() {
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; CHECK-FP16-LABEL: Const4:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: fmov h0, #31.00000000
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; CHECK-FP16-NEXT: ret
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;
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; CHECK-NOFP16-LABEL: Const4:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: adrp x8, .LCPI4_0
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; CHECK-NOFP16-NEXT: ldr h0, [x8, :lo12:.LCPI4_0]
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; CHECK-NOFP16-NEXT: ret
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entry:
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ret half 0xH4FC0
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}
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define half @Const5() {
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; CHECK-FP16-LABEL: Const5:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: mov w8, #12272
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; CHECK-FP16-NEXT: fmov h0, w8
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; CHECK-FP16-NEXT: ret
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;
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; CHECK-NOFP16-LABEL: Const5:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: adrp x8, .LCPI5_0
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; CHECK-NOFP16-NEXT: ldr h0, [x8, :lo12:.LCPI5_0]
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; CHECK-NOFP16-NEXT: ret
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entry:
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ret half 0xH2FF0
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}
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define half @Const6() {
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; CHECK-FP16-LABEL: Const6:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: mov w8, #20417
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; CHECK-FP16-NEXT: fmov h0, w8
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; CHECK-FP16-NEXT: ret
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;
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; CHECK-NOFP16-LABEL: Const6:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: adrp x8, .LCPI6_0
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; CHECK-NOFP16-NEXT: ldr h0, [x8, :lo12:.LCPI6_0]
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; CHECK-NOFP16-NEXT: ret
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entry:
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ret half 0xH4FC1
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}
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define half @Const7() {
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; CHECK-FP16-LABEL: Const7:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: mov w8, #20480
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; CHECK-FP16-NEXT: fmov h0, w8
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; CHECK-FP16-NEXT: ret
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;
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; CHECK-NOFP16-LABEL: Const7:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: adrp x8, .LCPI7_0
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; CHECK-NOFP16-NEXT: ldr h0, [x8, :lo12:.LCPI7_0]
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; CHECK-NOFP16-NEXT: ret
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entry:
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ret half 0xH5000
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}
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