1bc8b3258e
This pull request port `regallocfast` to new pass manager. It exposes the parameter `filter` to handle different register classes for AMDGPU. IIUC AMDGPU need to allocate different register classes separately so it need implement its own `--<reg-class>-regalloc`. Now users can use e.g. `-passe=regallocfast<filter=sgpr>` to allocate specific register class. The command line option `--regalloc-npm` is still in work progress, plan to reuse the syntax of passes, e.g. use `--regalloc-npm=regallocfast<filter=sgpr>,greedy<filter=vgpr>` to replace `--sgpr-regalloc` and `--vgpr-regalloc`.
28 lines
894 B
YAML
28 lines
894 B
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
|
# RUN: llc -mtriple aarch64-apple-ios -run-pass regallocfast -o - %s | FileCheck %s
|
|
# RUN: llc -mtriple aarch64-apple-ios -passes=regallocfast -o - %s | FileCheck %s
|
|
# This test used to crash the fast register alloc.
|
|
# Basically, when a basic block has liveins, the fast regalloc
|
|
# was deferencing the begin iterator of this block. However,
|
|
# when this block is empty and it will just crashed!
|
|
---
|
|
name: crashing
|
|
tracksRegLiveness: true
|
|
body: |
|
|
; CHECK-LABEL: name: crashing
|
|
; CHECK: bb.0:
|
|
; CHECK: successors: %bb.1(0x80000000)
|
|
; CHECK: liveins: $x0, $x1
|
|
; CHECK: bb.1:
|
|
; CHECK: renamable $w0 = MOVi32imm -1
|
|
; CHECK: RET_ReallyLR implicit killed $w0
|
|
bb.1:
|
|
liveins: $x0, $x1
|
|
|
|
bb.2:
|
|
%0:gpr32 = MOVi32imm -1
|
|
$w0 = COPY %0
|
|
RET_ReallyLR implicit $w0
|
|
|
|
...
|