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llvm-project/llvm/test/CodeGen/AArch64/icmp-cst.ll
AZero13 0e52092ff7
[AArch64] Adjust comparison constant if adjusting it means less instructions (#151024) 
Prefer constants that require less instructions to materialize, in both
Global-ISel and Selection-DAG
2025-08-18 14:56:45 +01:00

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LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc -mtriple=aarch64-linux-gnu -global-isel=0 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD
; RUN: llc -mtriple=aarch64-linux-gnu -global-isel=1 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-GI
define i1 @ule_11111111(i32 noundef %in) {
; CHECK-LABEL: ule_11111111:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #286331153 // =0x11111111
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, ls
; CHECK-NEXT: ret
%out = icmp ult i32 %in, 286331154
ret i1 %out
}
define i1 @ule_22222222(i32 noundef %in) {
; CHECK-LABEL: ule_22222222:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #572662306 // =0x22222222
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, ls
; CHECK-NEXT: ret
%out = icmp ult i32 %in, 572662307
ret i1 %out
}
define i1 @ule_33333333(i32 noundef %in) {
; CHECK-LABEL: ule_33333333:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #858993459 // =0x33333333
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, ls
; CHECK-NEXT: ret
%out = icmp ult i32 %in, 858993460
ret i1 %out
}
define i1 @ule_44444444(i32 noundef %in) {
; CHECK-LABEL: ule_44444444:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1145324612 // =0x44444444
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, ls
; CHECK-NEXT: ret
%out = icmp ult i32 %in, 1145324613
ret i1 %out
}
define i1 @ule_55555555(i32 noundef %in) {
; CHECK-LABEL: ule_55555555:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1431655765 // =0x55555555
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, ls
; CHECK-NEXT: ret
%out = icmp ult i32 %in, 1431655766
ret i1 %out
}
define i1 @ule_66666666(i32 noundef %in) {
; CHECK-LABEL: ule_66666666:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1717986918 // =0x66666666
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, ls
; CHECK-NEXT: ret
%out = icmp ult i32 %in, 1717986919
ret i1 %out
}
define i1 @ule_77777777(i32 noundef %in) {
; CHECK-LABEL: ule_77777777:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #2004318071 // =0x77777777
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, ls
; CHECK-NEXT: ret
%out = icmp ult i32 %in, 2004318072
ret i1 %out
}
define i1 @ule_88888888(i32 noundef %in) {
; CHECK-LABEL: ule_88888888:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #-2004318072 // =0x88888888
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, ls
; CHECK-NEXT: ret
%out = icmp ult i32 %in, -2004318071
ret i1 %out
}
define i1 @ule_99999999(i32 noundef %in) {
; CHECK-LABEL: ule_99999999:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #-1717986919 // =0x99999999
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, ls
; CHECK-NEXT: ret
%out = icmp ult i32 %in, -1717986918
ret i1 %out
}
define i1 @uge_11111111(i32 noundef %in) {
; CHECK-LABEL: uge_11111111:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #286331153 // =0x11111111
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, hs
; CHECK-NEXT: ret
%out = icmp ugt i32 %in, 286331152
ret i1 %out
}
define i1 @uge_22222222(i32 noundef %in) {
; CHECK-LABEL: uge_22222222:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #572662306 // =0x22222222
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, hs
; CHECK-NEXT: ret
%out = icmp ugt i32 %in, 572662305
ret i1 %out
}
define i1 @uge_33333333(i32 noundef %in) {
; CHECK-LABEL: uge_33333333:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #858993459 // =0x33333333
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, hs
; CHECK-NEXT: ret
%out = icmp ugt i32 %in, 858993458
ret i1 %out
}
define i1 @uge_44444444(i32 noundef %in) {
; CHECK-LABEL: uge_44444444:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1145324612 // =0x44444444
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, hs
; CHECK-NEXT: ret
%out = icmp ugt i32 %in, 1145324611
ret i1 %out
}
define i1 @uge_55555555(i32 noundef %in) {
; CHECK-LABEL: uge_55555555:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1431655765 // =0x55555555
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, hs
; CHECK-NEXT: ret
%out = icmp ugt i32 %in, 1431655764
ret i1 %out
}
define i1 @uge_66666666(i32 noundef %in) {
; CHECK-LABEL: uge_66666666:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1717986918 // =0x66666666
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, hs
; CHECK-NEXT: ret
%out = icmp ugt i32 %in, 1717986917
ret i1 %out
}
define i1 @uge_77777777(i32 noundef %in) {
; CHECK-LABEL: uge_77777777:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #2004318071 // =0x77777777
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, hs
; CHECK-NEXT: ret
%out = icmp ugt i32 %in, 2004318070
ret i1 %out
}
define i1 @uge_88888888(i32 noundef %in) {
; CHECK-LABEL: uge_88888888:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #-2004318072 // =0x88888888
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, hs
; CHECK-NEXT: ret
%out = icmp ugt i32 %in, -2004318073
ret i1 %out
}
define i1 @uge_99999999(i32 noundef %in) {
; CHECK-LABEL: uge_99999999:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #-1717986919 // =0x99999999
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, hs
; CHECK-NEXT: ret
%out = icmp ugt i32 %in, -1717986920
ret i1 %out
}
define i1 @sle_11111111(i32 noundef %in) {
; CHECK-LABEL: sle_11111111:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #286331153 // =0x11111111
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, le
; CHECK-NEXT: ret
%out = icmp slt i32 %in, 286331154
ret i1 %out
}
define i1 @sle_22222222(i32 noundef %in) {
; CHECK-LABEL: sle_22222222:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #572662306 // =0x22222222
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, le
; CHECK-NEXT: ret
%out = icmp slt i32 %in, 572662307
ret i1 %out
}
define i1 @sle_33333333(i32 noundef %in) {
; CHECK-LABEL: sle_33333333:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #858993459 // =0x33333333
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, le
; CHECK-NEXT: ret
%out = icmp slt i32 %in, 858993460
ret i1 %out
}
define i1 @sle_44444444(i32 noundef %in) {
; CHECK-LABEL: sle_44444444:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1145324612 // =0x44444444
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, le
; CHECK-NEXT: ret
%out = icmp slt i32 %in, 1145324613
ret i1 %out
}
define i1 @sle_55555555(i32 noundef %in) {
; CHECK-LABEL: sle_55555555:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1431655765 // =0x55555555
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, le
; CHECK-NEXT: ret
%out = icmp slt i32 %in, 1431655766
ret i1 %out
}
define i1 @sle_66666666(i32 noundef %in) {
; CHECK-LABEL: sle_66666666:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1717986918 // =0x66666666
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, le
; CHECK-NEXT: ret
%out = icmp slt i32 %in, 1717986919
ret i1 %out
}
define i1 @sle_77777777(i32 noundef %in) {
; CHECK-LABEL: sle_77777777:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #2004318071 // =0x77777777
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, le
; CHECK-NEXT: ret
%out = icmp slt i32 %in, 2004318072
ret i1 %out
}
define i1 @sle_88888888(i32 noundef %in) {
; CHECK-LABEL: sle_88888888:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #-2004318072 // =0x88888888
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, ls
; CHECK-NEXT: ret
%out = icmp ult i32 %in, -2004318071
ret i1 %out
}
define i1 @sle_99999999(i32 noundef %in) {
; CHECK-LABEL: sle_99999999:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #-1717986919 // =0x99999999
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, ls
; CHECK-NEXT: ret
%out = icmp ult i32 %in, -1717986918
ret i1 %out
}
define i1 @sge_11111111(i32 noundef %in) {
; CHECK-LABEL: sge_11111111:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #286331153 // =0x11111111
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, ge
; CHECK-NEXT: ret
%out = icmp sgt i32 %in, 286331152
ret i1 %out
}
define i1 @sge_22222222(i32 noundef %in) {
; CHECK-LABEL: sge_22222222:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #572662306 // =0x22222222
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, ge
; CHECK-NEXT: ret
%out = icmp sgt i32 %in, 572662305
ret i1 %out
}
define i1 @sge_33333333(i32 noundef %in) {
; CHECK-LABEL: sge_33333333:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #858993459 // =0x33333333
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, ge
; CHECK-NEXT: ret
%out = icmp sgt i32 %in, 858993458
ret i1 %out
}
define i1 @sge_44444444(i32 noundef %in) {
; CHECK-LABEL: sge_44444444:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1145324612 // =0x44444444
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, ge
; CHECK-NEXT: ret
%out = icmp sgt i32 %in, 1145324611
ret i1 %out
}
define i1 @sge_55555555(i32 noundef %in) {
; CHECK-LABEL: sge_55555555:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1431655765 // =0x55555555
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, ge
; CHECK-NEXT: ret
%out = icmp sgt i32 %in, 1431655764
ret i1 %out
}
define i1 @sge_66666666(i32 noundef %in) {
; CHECK-LABEL: sge_66666666:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1717986918 // =0x66666666
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, ge
; CHECK-NEXT: ret
%out = icmp sgt i32 %in, 1717986917
ret i1 %out
}
define i1 @sge_77777777(i32 noundef %in) {
; CHECK-LABEL: sge_77777777:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #2004318071 // =0x77777777
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, ge
; CHECK-NEXT: ret
%out = icmp sgt i32 %in, 2004318070
ret i1 %out
}
define i1 @sge_88888888(i32 noundef %in) {
; CHECK-LABEL: sge_88888888:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #-2004318072 // =0x88888888
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, hs
; CHECK-NEXT: ret
%out = icmp ugt i32 %in, -2004318073
ret i1 %out
}
define i1 @sge_99999999(i32 noundef %in) {
; CHECK-LABEL: sge_99999999:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #-1717986919 // =0x99999999
; CHECK-NEXT: cmp w0, w8
; CHECK-NEXT: cset w0, hs
; CHECK-NEXT: ret
%out = icmp ugt i32 %in, -1717986920
ret i1 %out
}
define i1 @ult_20014852997121(i64 noundef %in) {
; CHECK-LABEL: ult_20014852997121:
; CHECK: // %bb.0:
; CHECK-NEXT: mov x8, #305397760 // =0x12340000
; CHECK-NEXT: movk x8, #4660, lsl #32
; CHECK-NEXT: cmp x0, x8
; CHECK-NEXT: cset w0, ls
; CHECK-NEXT: ret
%out = icmp ult i64 %in, 20014852997121
ret i1 %out
}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CHECK-GI: {{.*}}
; CHECK-SD: {{.*}}
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