2ec91a5ec4
This is essentially from performAddSubCombine. addsub.ll has been cleaned up a little in the process.
134 lines
3.9 KiB
LLVM
134 lines
3.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-none-elf < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD
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; RUN: llc -mtriple=aarch64-none-elf -global-isel < %s | FileCheck %s --check-prefixes=CHECK,CHECK-GI
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define i32 @neg_select_neg(i32 %a, i32 %b, i1 %bb) {
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; CHECK-SD-LABEL: neg_select_neg:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: tst w2, #0x1
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; CHECK-SD-NEXT: csel w0, w0, w1, ne
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: neg_select_neg:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: and w8, w2, #0x1
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; CHECK-GI-NEXT: neg w9, w0
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; CHECK-GI-NEXT: tst w8, #0x1
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; CHECK-GI-NEXT: csneg w8, w9, w1, ne
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; CHECK-GI-NEXT: neg w0, w8
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; CHECK-GI-NEXT: ret
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%nega = sub i32 0, %a
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%negb = sub i32 0, %b
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%sel = select i1 %bb, i32 %nega, i32 %negb
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%res = sub i32 0, %sel
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ret i32 %res
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}
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define i32 @negneg_select_nega(i32 %a, i32 %b, i1 %bb) {
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; CHECK-SD-LABEL: negneg_select_nega:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: tst w2, #0x1
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; CHECK-SD-NEXT: csneg w0, w1, w0, eq
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: negneg_select_nega:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: and w8, w2, #0x1
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; CHECK-GI-NEXT: tst w8, #0x1
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; CHECK-GI-NEXT: csneg w8, w1, w0, eq
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; CHECK-GI-NEXT: neg w8, w8
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; CHECK-GI-NEXT: neg w0, w8
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; CHECK-GI-NEXT: ret
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%nega = sub i32 0, %a
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%sel = select i1 %bb, i32 %nega, i32 %b
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%nsel = sub i32 0, %sel
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%res = sub i32 0, %nsel
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ret i32 %res
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}
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define i32 @neg_select_nega(i32 %a, i32 %b, i1 %bb) {
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; CHECK-SD-LABEL: neg_select_nega:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: tst w2, #0x1
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; CHECK-SD-NEXT: csneg w0, w0, w1, ne
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: neg_select_nega:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: and w8, w2, #0x1
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; CHECK-GI-NEXT: tst w8, #0x1
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; CHECK-GI-NEXT: csneg w8, w1, w0, eq
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; CHECK-GI-NEXT: neg w0, w8
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; CHECK-GI-NEXT: ret
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%nega = sub i32 0, %a
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%sel = select i1 %bb, i32 %nega, i32 %b
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%res = sub i32 0, %sel
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ret i32 %res
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}
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define i32 @neg_select_negb(i32 %a, i32 %b, i1 %bb) {
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; CHECK-SD-LABEL: neg_select_negb:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: tst w2, #0x1
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; CHECK-SD-NEXT: csneg w0, w1, w0, eq
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: neg_select_negb:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: and w8, w2, #0x1
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; CHECK-GI-NEXT: tst w8, #0x1
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; CHECK-GI-NEXT: csneg w8, w0, w1, ne
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; CHECK-GI-NEXT: neg w0, w8
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; CHECK-GI-NEXT: ret
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%negb = sub i32 0, %b
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%sel = select i1 %bb, i32 %a, i32 %negb
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%res = sub i32 0, %sel
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ret i32 %res
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}
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define i32 @neg_select_ab(i32 %a, i32 %b, i1 %bb) {
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; CHECK-SD-LABEL: neg_select_ab:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: tst w2, #0x1
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; CHECK-SD-NEXT: csel w8, w0, w1, ne
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; CHECK-SD-NEXT: neg w0, w8
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: neg_select_ab:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: and w8, w2, #0x1
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; CHECK-GI-NEXT: tst w8, #0x1
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; CHECK-GI-NEXT: csel w8, w0, w1, ne
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; CHECK-GI-NEXT: neg w0, w8
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; CHECK-GI-NEXT: ret
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%sel = select i1 %bb, i32 %a, i32 %b
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%res = sub i32 0, %sel
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ret i32 %res
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}
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define i32 @neg_select_nega_with_use(i32 %a, i32 %b, i1 %bb) {
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; CHECK-SD-LABEL: neg_select_nega_with_use:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: tst w2, #0x1
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; CHECK-SD-NEXT: neg w8, w0
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; CHECK-SD-NEXT: csneg w9, w1, w0, eq
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; CHECK-SD-NEXT: sub w0, w8, w9
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: neg_select_nega_with_use:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: and w8, w2, #0x1
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; CHECK-GI-NEXT: tst w8, #0x1
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; CHECK-GI-NEXT: neg w8, w0
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; CHECK-GI-NEXT: csneg w9, w1, w0, eq
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; CHECK-GI-NEXT: sub w0, w8, w9
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; CHECK-GI-NEXT: ret
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%nega = sub i32 0, %a
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%sel = select i1 %bb, i32 %nega, i32 %b
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%nsel = sub i32 0, %sel
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%res = add i32 %nsel, %nega
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ret i32 %res
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}
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; CHECK: {{.*}}
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