llvm-project/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-select.ll
Sander de Smalen 61510b51c3 Revert "[AArch64] Enable subreg liveness tracking by default."
This reverts commit 9c319d5bb40785c969d2af76535ca62448dfafa7.

Some issues were discovered with the bootstrap builds, which
seem like they were caused by this commit. I'm reverting to investigate.
2024-12-12 17:22:15 +00:00

488 lines
18 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mattr=+sve -force-streaming-compatible < %s | FileCheck %s
; RUN: llc -mattr=+sme -force-streaming < %s | FileCheck %s
; RUN: llc -force-streaming-compatible < %s | FileCheck %s --check-prefix=NONEON-NOSVE
target triple = "aarch64-unknown-linux-gnu"
define <2 x half> @select_v2f16(<2 x half> %op1, <2 x half> %op2, i1 %mask) {
; CHECK-LABEL: select_v2f16:
; CHECK: // %bb.0:
; CHECK-NEXT: mov z2.h, w0
; CHECK-NEXT: ptrue p0.h
; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
; CHECK-NEXT: and z2.h, z2.h, #0x1
; CHECK-NEXT: cmpne p0.h, p0/z, z2.h, #0
; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: select_v2f16:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: sub sp, sp, #32
; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32
; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #8]
; NONEON-NOSVE-NEXT: tst w0, #0x1
; NONEON-NOSVE-NEXT: ldr h0, [sp, #22]
; NONEON-NOSVE-NEXT: ldr h1, [sp, #14]
; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #12]
; NONEON-NOSVE-NEXT: str h0, [sp, #30]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #20]
; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #10]
; NONEON-NOSVE-NEXT: str h0, [sp, #28]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #18]
; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #8]
; NONEON-NOSVE-NEXT: str h0, [sp, #26]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #16]
; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne
; NONEON-NOSVE-NEXT: str h0, [sp, #24]
; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]
; NONEON-NOSVE-NEXT: add sp, sp, #32
; NONEON-NOSVE-NEXT: ret
%sel = select i1 %mask, <2 x half> %op1, <2 x half> %op2
ret <2 x half> %sel
}
define <4 x half> @select_v4f16(<4 x half> %op1, <4 x half> %op2, i1 %mask) {
; CHECK-LABEL: select_v4f16:
; CHECK: // %bb.0:
; CHECK-NEXT: mov z2.h, w0
; CHECK-NEXT: ptrue p0.h
; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
; CHECK-NEXT: and z2.h, z2.h, #0x1
; CHECK-NEXT: cmpne p0.h, p0/z, z2.h, #0
; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: select_v4f16:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: sub sp, sp, #32
; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32
; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #8]
; NONEON-NOSVE-NEXT: tst w0, #0x1
; NONEON-NOSVE-NEXT: ldr h0, [sp, #22]
; NONEON-NOSVE-NEXT: ldr h1, [sp, #14]
; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #12]
; NONEON-NOSVE-NEXT: str h0, [sp, #30]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #20]
; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #10]
; NONEON-NOSVE-NEXT: str h0, [sp, #28]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #18]
; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #8]
; NONEON-NOSVE-NEXT: str h0, [sp, #26]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #16]
; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne
; NONEON-NOSVE-NEXT: str h0, [sp, #24]
; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]
; NONEON-NOSVE-NEXT: add sp, sp, #32
; NONEON-NOSVE-NEXT: ret
%sel = select i1 %mask, <4 x half> %op1, <4 x half> %op2
ret <4 x half> %sel
}
define <8 x half> @select_v8f16(<8 x half> %op1, <8 x half> %op2, i1 %mask) {
; CHECK-LABEL: select_v8f16:
; CHECK: // %bb.0:
; CHECK-NEXT: mov z2.h, w0
; CHECK-NEXT: ptrue p0.h
; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
; CHECK-NEXT: and z2.h, z2.h, #0x1
; CHECK-NEXT: cmpne p0.h, p0/z, z2.h, #0
; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h
; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: select_v8f16:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!
; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48
; NONEON-NOSVE-NEXT: ldr h0, [sp, #30]
; NONEON-NOSVE-NEXT: ldr h1, [sp, #14]
; NONEON-NOSVE-NEXT: tst w0, #0x1
; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #12]
; NONEON-NOSVE-NEXT: str h0, [sp, #46]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #28]
; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #10]
; NONEON-NOSVE-NEXT: str h0, [sp, #44]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #26]
; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #8]
; NONEON-NOSVE-NEXT: str h0, [sp, #42]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #24]
; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #6]
; NONEON-NOSVE-NEXT: str h0, [sp, #40]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #22]
; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #4]
; NONEON-NOSVE-NEXT: str h0, [sp, #38]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #20]
; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #2]
; NONEON-NOSVE-NEXT: str h0, [sp, #36]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #18]
; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp]
; NONEON-NOSVE-NEXT: str h0, [sp, #34]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #16]
; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne
; NONEON-NOSVE-NEXT: str h0, [sp, #32]
; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]
; NONEON-NOSVE-NEXT: add sp, sp, #48
; NONEON-NOSVE-NEXT: ret
%sel = select i1 %mask, <8 x half> %op1, <8 x half> %op2
ret <8 x half> %sel
}
define void @select_v16f16(ptr %a, ptr %b, i1 %mask) {
; CHECK-LABEL: select_v16f16:
; CHECK: // %bb.0:
; CHECK-NEXT: mov z0.h, w2
; CHECK-NEXT: ptrue p0.h
; CHECK-NEXT: and z0.h, z0.h, #0x1
; CHECK-NEXT: cmpne p0.h, p0/z, z0.h, #0
; CHECK-NEXT: ldr q0, [x0]
; CHECK-NEXT: ldr q1, [x0, #16]
; CHECK-NEXT: ldr q2, [x1]
; CHECK-NEXT: ldr q3, [x1, #16]
; CHECK-NEXT: sel z0.h, p0, z0.h, z2.h
; CHECK-NEXT: sel z1.h, p0, z1.h, z3.h
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: select_v16f16:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: sub sp, sp, #96
; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96
; NONEON-NOSVE-NEXT: ldr q0, [x0]
; NONEON-NOSVE-NEXT: ldr q1, [x0, #16]
; NONEON-NOSVE-NEXT: tst w2, #0x1
; NONEON-NOSVE-NEXT: ldr q2, [x1]
; NONEON-NOSVE-NEXT: ldr q3, [x1, #16]
; NONEON-NOSVE-NEXT: str q0, [sp]
; NONEON-NOSVE-NEXT: stp q1, q3, [sp, #16]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #30]
; NONEON-NOSVE-NEXT: ldr h1, [sp, #46]
; NONEON-NOSVE-NEXT: str q2, [sp, #48]
; NONEON-NOSVE-NEXT: fcsel s0, s0, s1, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #44]
; NONEON-NOSVE-NEXT: str h0, [sp, #78]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #28]
; NONEON-NOSVE-NEXT: fcsel s0, s0, s1, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #42]
; NONEON-NOSVE-NEXT: str h0, [sp, #76]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #26]
; NONEON-NOSVE-NEXT: fcsel s0, s0, s1, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #40]
; NONEON-NOSVE-NEXT: str h0, [sp, #74]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #24]
; NONEON-NOSVE-NEXT: fcsel s0, s0, s1, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #38]
; NONEON-NOSVE-NEXT: str h0, [sp, #72]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #22]
; NONEON-NOSVE-NEXT: fcsel s0, s0, s1, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #36]
; NONEON-NOSVE-NEXT: str h0, [sp, #70]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #20]
; NONEON-NOSVE-NEXT: fcsel s0, s0, s1, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #34]
; NONEON-NOSVE-NEXT: str h0, [sp, #68]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #18]
; NONEON-NOSVE-NEXT: fcsel s0, s0, s1, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #32]
; NONEON-NOSVE-NEXT: str h0, [sp, #66]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #16]
; NONEON-NOSVE-NEXT: fcsel s0, s0, s1, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #62]
; NONEON-NOSVE-NEXT: str h0, [sp, #64]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #14]
; NONEON-NOSVE-NEXT: fcsel s0, s0, s1, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #60]
; NONEON-NOSVE-NEXT: str h0, [sp, #94]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #12]
; NONEON-NOSVE-NEXT: fcsel s0, s0, s1, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #58]
; NONEON-NOSVE-NEXT: str h0, [sp, #92]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #10]
; NONEON-NOSVE-NEXT: fcsel s0, s0, s1, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #56]
; NONEON-NOSVE-NEXT: str h0, [sp, #90]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #8]
; NONEON-NOSVE-NEXT: fcsel s0, s0, s1, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #54]
; NONEON-NOSVE-NEXT: str h0, [sp, #88]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #6]
; NONEON-NOSVE-NEXT: fcsel s0, s0, s1, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #52]
; NONEON-NOSVE-NEXT: str h0, [sp, #86]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #4]
; NONEON-NOSVE-NEXT: fcsel s0, s0, s1, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #50]
; NONEON-NOSVE-NEXT: str h0, [sp, #84]
; NONEON-NOSVE-NEXT: ldr h0, [sp, #2]
; NONEON-NOSVE-NEXT: fcsel s0, s0, s1, ne
; NONEON-NOSVE-NEXT: ldr h1, [sp, #48]
; NONEON-NOSVE-NEXT: str h0, [sp, #82]
; NONEON-NOSVE-NEXT: ldr h0, [sp]
; NONEON-NOSVE-NEXT: fcsel s0, s0, s1, ne
; NONEON-NOSVE-NEXT: str h0, [sp, #80]
; NONEON-NOSVE-NEXT: ldp q1, q0, [sp, #64]
; NONEON-NOSVE-NEXT: stp q0, q1, [x0]
; NONEON-NOSVE-NEXT: add sp, sp, #96
; NONEON-NOSVE-NEXT: ret
%op1 = load volatile <16 x half>, ptr %a
%op2 = load volatile <16 x half>, ptr %b
%sel = select i1 %mask, <16 x half> %op1, <16 x half> %op2
store <16 x half> %sel, ptr %a
ret void
}
define <2 x float> @select_v2f32(<2 x float> %op1, <2 x float> %op2, i1 %mask) {
; CHECK-LABEL: select_v2f32:
; CHECK: // %bb.0:
; CHECK-NEXT: and w8, w0, #0x1
; CHECK-NEXT: ptrue p0.s
; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
; CHECK-NEXT: mov z2.s, w8
; CHECK-NEXT: cmpne p0.s, p0/z, z2.s, #0
; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: select_v2f32:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: sub sp, sp, #32
; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32
; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #8]
; NONEON-NOSVE-NEXT: tst w0, #0x1
; NONEON-NOSVE-NEXT: ldp s1, s2, [sp, #8]
; NONEON-NOSVE-NEXT: ldr s0, [sp, #20]
; NONEON-NOSVE-NEXT: fcsel s3, s2, s0, ne
; NONEON-NOSVE-NEXT: ldr s0, [sp, #16]
; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne
; NONEON-NOSVE-NEXT: stp s0, s3, [sp, #24]
; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]
; NONEON-NOSVE-NEXT: add sp, sp, #32
; NONEON-NOSVE-NEXT: ret
%sel = select i1 %mask, <2 x float> %op1, <2 x float> %op2
ret <2 x float> %sel
}
define <4 x float> @select_v4f32(<4 x float> %op1, <4 x float> %op2, i1 %mask) {
; CHECK-LABEL: select_v4f32:
; CHECK: // %bb.0:
; CHECK-NEXT: and w8, w0, #0x1
; CHECK-NEXT: ptrue p0.s
; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
; CHECK-NEXT: mov z2.s, w8
; CHECK-NEXT: cmpne p0.s, p0/z, z2.s, #0
; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s
; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: select_v4f32:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!
; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48
; NONEON-NOSVE-NEXT: ldp s1, s2, [sp, #8]
; NONEON-NOSVE-NEXT: tst w0, #0x1
; NONEON-NOSVE-NEXT: ldr s0, [sp, #28]
; NONEON-NOSVE-NEXT: fcsel s3, s2, s0, ne
; NONEON-NOSVE-NEXT: ldr s0, [sp, #24]
; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne
; NONEON-NOSVE-NEXT: ldp s1, s2, [sp]
; NONEON-NOSVE-NEXT: stp s0, s3, [sp, #40]
; NONEON-NOSVE-NEXT: ldr s0, [sp, #20]
; NONEON-NOSVE-NEXT: fcsel s3, s2, s0, ne
; NONEON-NOSVE-NEXT: ldr s0, [sp, #16]
; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne
; NONEON-NOSVE-NEXT: stp s0, s3, [sp, #32]
; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]
; NONEON-NOSVE-NEXT: add sp, sp, #48
; NONEON-NOSVE-NEXT: ret
%sel = select i1 %mask, <4 x float> %op1, <4 x float> %op2
ret <4 x float> %sel
}
define void @select_v8f32(ptr %a, ptr %b, i1 %mask) {
; CHECK-LABEL: select_v8f32:
; CHECK: // %bb.0:
; CHECK-NEXT: and w8, w2, #0x1
; CHECK-NEXT: ptrue p0.s
; CHECK-NEXT: mov z0.s, w8
; CHECK-NEXT: cmpne p0.s, p0/z, z0.s, #0
; CHECK-NEXT: ldr q0, [x0]
; CHECK-NEXT: ldr q1, [x0, #16]
; CHECK-NEXT: ldr q2, [x1]
; CHECK-NEXT: ldr q3, [x1, #16]
; CHECK-NEXT: sel z0.s, p0, z0.s, z2.s
; CHECK-NEXT: sel z1.s, p0, z1.s, z3.s
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: select_v8f32:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: sub sp, sp, #96
; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96
; NONEON-NOSVE-NEXT: ldr q0, [x0]
; NONEON-NOSVE-NEXT: ldr q1, [x0, #16]
; NONEON-NOSVE-NEXT: tst w2, #0x1
; NONEON-NOSVE-NEXT: ldr q2, [x1]
; NONEON-NOSVE-NEXT: ldr q3, [x1, #16]
; NONEON-NOSVE-NEXT: str q0, [sp]
; NONEON-NOSVE-NEXT: stp q1, q3, [sp, #16]
; NONEON-NOSVE-NEXT: str q2, [sp, #48]
; NONEON-NOSVE-NEXT: ldp s1, s2, [sp, #40]
; NONEON-NOSVE-NEXT: ldr s0, [sp, #28]
; NONEON-NOSVE-NEXT: fcsel s3, s0, s2, ne
; NONEON-NOSVE-NEXT: ldr s0, [sp, #24]
; NONEON-NOSVE-NEXT: fcsel s0, s0, s1, ne
; NONEON-NOSVE-NEXT: ldp s1, s2, [sp, #32]
; NONEON-NOSVE-NEXT: stp s0, s3, [sp, #72]
; NONEON-NOSVE-NEXT: ldr s0, [sp, #20]
; NONEON-NOSVE-NEXT: fcsel s3, s0, s2, ne
; NONEON-NOSVE-NEXT: ldr s0, [sp, #16]
; NONEON-NOSVE-NEXT: fcsel s0, s0, s1, ne
; NONEON-NOSVE-NEXT: ldp s1, s2, [sp, #56]
; NONEON-NOSVE-NEXT: stp s0, s3, [sp, #64]
; NONEON-NOSVE-NEXT: ldr s0, [sp, #12]
; NONEON-NOSVE-NEXT: fcsel s3, s0, s2, ne
; NONEON-NOSVE-NEXT: ldr s0, [sp, #8]
; NONEON-NOSVE-NEXT: fcsel s0, s0, s1, ne
; NONEON-NOSVE-NEXT: ldp s1, s2, [sp, #48]
; NONEON-NOSVE-NEXT: stp s0, s3, [sp, #88]
; NONEON-NOSVE-NEXT: ldr s0, [sp, #4]
; NONEON-NOSVE-NEXT: fcsel s3, s0, s2, ne
; NONEON-NOSVE-NEXT: ldr s0, [sp]
; NONEON-NOSVE-NEXT: fcsel s0, s0, s1, ne
; NONEON-NOSVE-NEXT: stp s0, s3, [sp, #80]
; NONEON-NOSVE-NEXT: ldp q1, q0, [sp, #64]
; NONEON-NOSVE-NEXT: stp q0, q1, [x0]
; NONEON-NOSVE-NEXT: add sp, sp, #96
; NONEON-NOSVE-NEXT: ret
%op1 = load volatile <8 x float>, ptr %a
%op2 = load volatile <8 x float>, ptr %b
%sel = select i1 %mask, <8 x float> %op1, <8 x float> %op2
store <8 x float> %sel, ptr %a
ret void
}
define <1 x double> @select_v1f64(<1 x double> %op1, <1 x double> %op2, i1 %mask) {
; CHECK-LABEL: select_v1f64:
; CHECK: // %bb.0:
; CHECK-NEXT: tst w0, #0x1
; CHECK-NEXT: fcsel d0, d0, d1, ne
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: select_v1f64:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: sub sp, sp, #16
; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16
; NONEON-NOSVE-NEXT: tst w0, #0x1
; NONEON-NOSVE-NEXT: fcsel d0, d0, d1, ne
; NONEON-NOSVE-NEXT: str d0, [sp, #8]
; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]
; NONEON-NOSVE-NEXT: add sp, sp, #16
; NONEON-NOSVE-NEXT: ret
%sel = select i1 %mask, <1 x double> %op1, <1 x double> %op2
ret <1 x double> %sel
}
define <2 x double> @select_v2f64(<2 x double> %op1, <2 x double> %op2, i1 %mask) {
; CHECK-LABEL: select_v2f64:
; CHECK: // %bb.0:
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
; CHECK-NEXT: and x8, x0, #0x1
; CHECK-NEXT: ptrue p0.d
; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
; CHECK-NEXT: mov z2.d, x8
; CHECK-NEXT: cmpne p0.d, p0/z, z2.d, #0
; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d
; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: select_v2f64:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!
; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48
; NONEON-NOSVE-NEXT: ldp d1, d2, [sp]
; NONEON-NOSVE-NEXT: tst w0, #0x1
; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]
; NONEON-NOSVE-NEXT: fcsel d3, d2, d0, ne
; NONEON-NOSVE-NEXT: ldr d0, [sp, #16]
; NONEON-NOSVE-NEXT: fcsel d0, d1, d0, ne
; NONEON-NOSVE-NEXT: stp d0, d3, [sp, #32]
; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]
; NONEON-NOSVE-NEXT: add sp, sp, #48
; NONEON-NOSVE-NEXT: ret
%sel = select i1 %mask, <2 x double> %op1, <2 x double> %op2
ret <2 x double> %sel
}
define void @select_v4f64(ptr %a, ptr %b, i1 %mask) {
; CHECK-LABEL: select_v4f64:
; CHECK: // %bb.0:
; CHECK-NEXT: // kill: def $w2 killed $w2 def $x2
; CHECK-NEXT: and x8, x2, #0x1
; CHECK-NEXT: ptrue p0.d
; CHECK-NEXT: mov z0.d, x8
; CHECK-NEXT: cmpne p0.d, p0/z, z0.d, #0
; CHECK-NEXT: ldr q0, [x0]
; CHECK-NEXT: ldr q1, [x0, #16]
; CHECK-NEXT: ldr q2, [x1]
; CHECK-NEXT: ldr q3, [x1, #16]
; CHECK-NEXT: sel z0.d, p0, z0.d, z2.d
; CHECK-NEXT: sel z1.d, p0, z1.d, z3.d
; CHECK-NEXT: stp q0, q1, [x0]
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: select_v4f64:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: sub sp, sp, #96
; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96
; NONEON-NOSVE-NEXT: ldr q0, [x0]
; NONEON-NOSVE-NEXT: ldr q1, [x0, #16]
; NONEON-NOSVE-NEXT: tst w2, #0x1
; NONEON-NOSVE-NEXT: ldr q2, [x1]
; NONEON-NOSVE-NEXT: ldr q3, [x1, #16]
; NONEON-NOSVE-NEXT: str q0, [sp]
; NONEON-NOSVE-NEXT: stp q1, q3, [sp, #16]
; NONEON-NOSVE-NEXT: str q2, [sp, #48]
; NONEON-NOSVE-NEXT: ldp d1, d2, [sp, #32]
; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]
; NONEON-NOSVE-NEXT: fcsel d3, d0, d2, ne
; NONEON-NOSVE-NEXT: ldr d0, [sp, #16]
; NONEON-NOSVE-NEXT: fcsel d0, d0, d1, ne
; NONEON-NOSVE-NEXT: ldp d1, d2, [sp, #48]
; NONEON-NOSVE-NEXT: stp d0, d3, [sp, #64]
; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]
; NONEON-NOSVE-NEXT: fcsel d3, d0, d2, ne
; NONEON-NOSVE-NEXT: ldr d0, [sp]
; NONEON-NOSVE-NEXT: fcsel d0, d0, d1, ne
; NONEON-NOSVE-NEXT: stp d0, d3, [sp, #80]
; NONEON-NOSVE-NEXT: ldp q1, q0, [sp, #64]
; NONEON-NOSVE-NEXT: stp q0, q1, [x0]
; NONEON-NOSVE-NEXT: add sp, sp, #96
; NONEON-NOSVE-NEXT: ret
%op1 = load volatile <4 x double>, ptr %a
%op2 = load volatile <4 x double>, ptr %b
%sel = select i1 %mask, <4 x double> %op1, <4 x double> %op2
store <4 x double> %sel, ptr %a
ret void
}