0773854575
avgceil version : https://alive2.llvm.org/ce/z/2CKrRh Fixes #147773 --------- Co-authored-by: Simon Pilgrim <llvm-dev@redking.me.uk>
54 lines
1.8 KiB
LLVM
54 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=aarch64-- -O2 -mattr=+neon < %s | FileCheck %s
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define <8 x i8> @avgceil_u_i8_to_i16(<8 x i8> %a, <8 x i8> %b) {
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; CHECK-LABEL: avgceil_u_i8_to_i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: urhadd v0.8b, v0.8b, v1.8b
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; CHECK-NEXT: ret
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%a16 = zext <8 x i8> %a to <8 x i16>
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%b16 = zext <8 x i8> %b to <8 x i16>
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%avg16 = call <8 x i16> @llvm.aarch64.neon.urhadd.v8i16(<8 x i16> %a16, <8 x i16> %b16)
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%r = trunc <8 x i16> %avg16 to <8 x i8>
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ret <8 x i8> %r
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}
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define <8 x i8> @test_avgceil_s(<8 x i8> %a, <8 x i8> %b) {
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; CHECK-LABEL: test_avgceil_s:
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; CHECK: // %bb.0:
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; CHECK-NEXT: srhadd v0.8b, v0.8b, v1.8b
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; CHECK-NEXT: ret
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%a16 = sext <8 x i8> %a to <8 x i16>
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%b16 = sext <8 x i8> %b to <8 x i16>
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%avg16 = call <8 x i16> @llvm.aarch64.neon.srhadd.v8i16(<8 x i16> %a16, <8 x i16> %b16)
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%res = trunc <8 x i16> %avg16 to <8 x i8>
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ret <8 x i8> %res
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}
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define <8 x i8> @avgfloor_u_i8_to_i16(<8 x i8> %a, <8 x i8> %b) {
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; CHECK-LABEL: avgfloor_u_i8_to_i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: uhadd v0.8b, v0.8b, v1.8b
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; CHECK-NEXT: ret
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%a16 = zext <8 x i8> %a to <8 x i16>
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%b16 = zext <8 x i8> %b to <8 x i16>
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%avg16 = call <8 x i16> @llvm.aarch64.neon.uhadd.v8i16(<8 x i16> %a16, <8 x i16> %b16)
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%res = trunc <8 x i16> %avg16 to <8 x i8>
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ret <8 x i8> %res
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}
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define <8 x i8> @test_avgfloor_s(<8 x i8> %a, <8 x i8> %b) {
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; CHECK-LABEL: test_avgfloor_s:
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; CHECK: // %bb.0:
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; CHECK-NEXT: shadd v0.8b, v0.8b, v1.8b
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; CHECK-NEXT: ret
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%a16 = sext <8 x i8> %a to <8 x i16>
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%b16 = sext <8 x i8> %b to <8 x i16>
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%avg16 = call <8 x i16> @llvm.aarch64.neon.shadd.v8i16(<8 x i16> %a16, <8 x i16> %b16)
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%res = trunc <8 x i16> %avg16 to <8 x i8>
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ret <8 x i8> %res
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}
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