9c4c2f2472
Based ontop of D104598, which is a NFCI-ish refactoring. Here, a restriction, that only empty blocks can be merged, is lifted. Reviewed By: rnk Differential Revision: https://reviews.llvm.org/D104597
31 lines
946 B
LLVM
31 lines
946 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -verify-machineinstrs | FileCheck %s
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define i32 @vec_extract_branch(<2 x double> %x, i32 %y) {
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; CHECK-LABEL: vec_extract_branch:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fcmgt v0.2d, v0.2d, #0.0
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; CHECK-NEXT: xtn v0.2s, v0.2d
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; CHECK-NEXT: mov w8, v0.s[1]
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; CHECK-NEXT: fmov w9, s0
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; CHECK-NEXT: and w8, w9, w8
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; CHECK-NEXT: tbz w8, #0, .LBB0_2
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; CHECK-NEXT: // %bb.1: // %true
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; CHECK-NEXT: mov w8, #42
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; CHECK-NEXT: sdiv w0, w8, w0
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB0_2:
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; CHECK-NEXT: mov w0, #88
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; CHECK-NEXT: ret
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%t1 = fcmp ogt <2 x double> %x, zeroinitializer
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%t2 = extractelement <2 x i1> %t1, i32 0
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%t3 = extractelement <2 x i1> %t1, i32 1
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%t4 = and i1 %t2, %t3
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br i1 %t4, label %true, label %false
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true:
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%y1 = sdiv i32 42, %y
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ret i32 %y1
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false:
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ret i32 88
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}
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