21a42bcc0b
Get rid of the handwritten instruction selector code for handling G_CONSTANT. This code wasn't checking all the preconditions correctly anyway, so it's better to leave it to TableGen, which can handle at least some cases correctly (e.g. MOVi, MOVi16, folding into binary operations). Also add tests to cover those cases. llvm-svn: 318146
113 lines
2.8 KiB
LLVM
113 lines
2.8 KiB
LLVM
; RUN: llc -mtriple arm-gnueabi -mattr=+v6t2,+hwdiv-arm -global-isel %s -o - | FileCheck %s -check-prefixes=CHECK,HWDIV
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; RUN: llc -mtriple arm-gnueabi -mattr=+v6t2,-hwdiv-arm -global-isel %s -o - | FileCheck %s -check-prefixes=CHECK,SOFT-AEABI
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; RUN: llc -mtriple arm-gnu -mattr=+v6t2,+hwdiv-arm -global-isel %s -o - | FileCheck %s -check-prefixes=CHECK,HWDIV
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; RUN: llc -mtriple arm-gnu -mattr=+v6t2,-hwdiv-arm -global-isel %s -o - | FileCheck %s -check-prefixes=CHECK,SOFT-DEFAULT
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define arm_aapcscc i32 @test_sdiv_i32(i32 %a, i32 %b) {
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; CHECK-LABEL: test_sdiv_i32:
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; HWDIV: sdiv
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; SOFT-AEABI: bl __aeabi_idiv
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; SOFT-DEFAULT: bl __divsi3
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%r = sdiv i32 %a, %b
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ret i32 %r
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}
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define arm_aapcscc i32 @test_udiv_i32(i32 %a, i32 %b) {
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; CHECK-LABEL: test_udiv_i32:
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; HWDIV: udiv
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; SOFT-AEABI: bl __aeabi_uidiv
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; SOFT-DEFAULT: bl __udivsi3
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%r = udiv i32 %a, %b
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ret i32 %r
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}
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define arm_aapcscc i16 @test_sdiv_i16(i16 %a, i16 %b) {
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; CHECK-LABEL: test_sdiv_i16:
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; HWDIV: sdiv
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; SOFT-AEABI: bl __aeabi_idiv
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; SOFT-DEFAULT: bl __divsi3
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%r = sdiv i16 %a, %b
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ret i16 %r
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}
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define arm_aapcscc i16 @test_udiv_i16(i16 %a, i16 %b) {
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; CHECK-LABEL: test_udiv_i16:
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; HWDIV: udiv
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; SOFT-AEABI: bl __aeabi_uidiv
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; SOFT-DEFAULT: bl __udivsi3
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%r = udiv i16 %a, %b
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ret i16 %r
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}
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define arm_aapcscc i8 @test_sdiv_i8(i8 %a, i8 %b) {
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; CHECK-LABEL: test_sdiv_i8:
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; HWDIV: sdiv
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; SOFT-AEABI: bl __aeabi_idiv
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; SOFT-DEFAULT: bl __divsi3
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%r = sdiv i8 %a, %b
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ret i8 %r
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}
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define arm_aapcscc i8 @test_udiv_i8(i8 %a, i8 %b) {
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; CHECK-LABEL: test_udiv_i8:
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; HWDIV: udiv
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; SOFT-AEABI: bl __aeabi_uidiv
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; SOFT-DEFAULT: bl __udivsi3
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%r = udiv i8 %a, %b
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ret i8 %r
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}
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define arm_aapcscc i32 @test_srem_i32(i32 %x, i32 %y) {
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; CHECK-LABEL: test_srem_i32:
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; HWDIV: sdiv
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; SOFT-AEABI: bl __aeabi_idivmod
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; SOFT-DEFAULT: bl __modsi3
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%r = srem i32 %x, %y
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ret i32 %r
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}
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define arm_aapcscc i32 @test_urem_i32(i32 %x, i32 %y) {
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; CHECK-LABEL: test_urem_i32:
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; HWDIV: udiv
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; SOFT-AEABI: bl __aeabi_uidivmod
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; SOFT-DEFAULT: bl __umodsi3
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%r = urem i32 %x, %y
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ret i32 %r
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}
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define arm_aapcscc i16 @test_srem_i16(i16 %x, i16 %y) {
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; CHECK-LABEL: test_srem_i16:
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; HWDIV: sdiv
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; SOFT-AEABI: bl __aeabi_idivmod
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; SOFT-DEFAULT: bl __modsi3
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%r = srem i16 %x, %y
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ret i16 %r
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}
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define arm_aapcscc i16 @test_urem_i16(i16 %x, i16 %y) {
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; CHECK-LABEL: test_urem_i16:
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; HWDIV: udiv
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; SOFT-AEABI: bl __aeabi_uidivmod
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; SOFT-DEFAULT: bl __umodsi3
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%r = urem i16 %x, %y
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ret i16 %r
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}
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define arm_aapcscc i8 @test_srem_i8(i8 %x, i8 %y) {
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; CHECK-LABEL: test_srem_i8:
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; HWDIV: sdiv
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; SOFT-AEABI: bl __aeabi_idivmod
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; SOFT-DEFAULT: bl __modsi3
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%r = srem i8 %x, %y
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ret i8 %r
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}
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define arm_aapcscc i8 @test_urem_i8(i8 %x, i8 %y) {
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; CHECK-LABEL: test_urem_i8:
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; HWDIV: udiv
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; SOFT-AEABI: bl __aeabi_uidivmod
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; SOFT-DEFAULT: bl __umodsi3
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%r = urem i8 %x, %y
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ret i8 %r
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}
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