e1aa782bd0
Generate the slowest possible codepath for noopt CodeGen. Even trying to be clever with the negated jump can cause out-of-range jumps. Use a wide branch instead. Although the code is modelled simplistically, the later optimizations would recombine the branching into `cbz` if possible. This re-enables the previous optimization as well as hopefully gives us working code in all cases. Addresses PR30356! llvm-svn: 285649
50 lines
1.0 KiB
LLVM
50 lines
1.0 KiB
LLVM
; RUN: llc -mtriple thumbv7-windows-itanium -filetype asm -o - %s | FileCheck %s
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; RUN: llc -mtriple thumbv7-windows-msvc -filetype asm -o - %s | FileCheck %s
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define arm_aapcs_vfpcc i32 @sdiv32(i32 %divisor, i32 %divident) {
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entry:
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%div = sdiv i32 %divident, %divisor
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ret i32 %div
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}
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; CHECK-LABEL: sdiv32:
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; CHECK: cbz r0
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; CHECK: bl __rt_sdiv
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; CHECK: __brkdiv0
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define arm_aapcs_vfpcc i32 @udiv32(i32 %divisor, i32 %divident) {
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entry:
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%div = udiv i32 %divident, %divisor
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ret i32 %div
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}
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; CHECK-LABEL: udiv32:
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; CHECK: cbz r0
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; CHECK: bl __rt_udiv
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; CHECK: __brkdiv0
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define arm_aapcs_vfpcc i64 @sdiv64(i64 %divisor, i64 %divident) {
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entry:
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%div = sdiv i64 %divident, %divisor
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ret i64 %div
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}
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; CHECK-LABEL: sdiv64:
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; CHECK: orrs.w r4, r0, r1
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; CHECK-NEXT: beq
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; CHECK: bl __rt_sdiv64
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; CHECK: __brkdiv0
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define arm_aapcs_vfpcc i64 @udiv64(i64 %divisor, i64 %divident) {
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entry:
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%div = udiv i64 %divident, %divisor
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ret i64 %div
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}
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; CHECK-LABEL: udiv64:
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; CHECK: orrs.w r4, r0, r1
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; CHECK-NEXT: beq
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; CHECK: bl __rt_udiv64
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; CHECK: __brkdiv0
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