74cdb8e6f8
The floating-point and MVE features together specify the MVE functionality that is supported on the Cortex-M85 processor. But the FPU extension for the underlying architecture(armv8.1-m.main) is FPV5 which does not include MVE-F. So Compiler's -S output and `-save-temps=obj` loses MVE feature which leads to assembler error. What happening here is .fpu directive overrides any previously set features by .cpu directive. Since the the corresponding .fpu generated (.fpu fpv5-d16) does not include MVE-F, it overrides those features even though it is supported and set by the .cpu directive. Looks like .fpu is supposed to do this. In this case, there should be an .arch_extension directive re-enabling the relevant extensions after .fpu if the goal is to keep these extensions enabled. GCC also does the same. So this patch enables the MVE features by emitting the below arch extension: .fpu fpv5-d16 .arch_extension mve.fp --------- Co-authored-by: Simi Pallipurath <simi.pallipurath.com>
15 lines
477 B
LLVM
15 lines
477 B
LLVM
; RUN: llc -mtriple=arm-none-eabi -mcpu=cortex-m85 --float-abi=hard %s -o - | FileCheck %s
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; RUN: llc -mtriple=arm-none-eabi -mcpu=cortex-m55 --float-abi=hard %s -o - | FileCheck %s
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; CHECK: .fpu fpv5-d16
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; CHECK-NEXT: .arch_extension mve.fp
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define <4 x float> @vsubf32(<4 x float> %A, <4 x float> %B) {
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; CHECK-LABEL: vsubf32:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: vsub.f32 q0, q0, q1
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; CHECK-NEXT: bx lr
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%tmp3 = fsub <4 x float> %A, %B
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ret <4 x float> %tmp3
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}
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