3651635eca
Much like f16 and f32, we shouldn't try to shrink bf16 to smaller fp constant. The code may not be optimal, but this allows us to legalize bf16 constants under Arm without errors.
138 lines
4.1 KiB
LLVM
138 lines
4.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=armv8.6a-none-none-eabi < %s | FileCheck %s --check-prefixes=CHECK
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; RUN: llc -mtriple=armv8.6a-none-none-eabi -mattr=+bf16,+neon < %s | FileCheck %s --check-prefixes=CHECK
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; RUN: llc -mtriple=armv8.6a-none-none-eabi -mattr=+bf16,+neon,+fullfp16 < %s | FileCheck %s --check-prefix=CHECK-FP16
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; RUN: llc -mtriple=armv8.6a-none-none-eabi -mattr=+bf16,+neon -float-abi=hard < %s | FileCheck %s --check-prefix=CHECK-HARD
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define bfloat @bitcast_zero() {
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; CHECK-LABEL: bitcast_zero:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: .pad #4
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; CHECK-NEXT: sub sp, sp, #4
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; CHECK-NEXT: mov r0, #0
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; CHECK-NEXT: strh r0, [sp, #2]
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; CHECK-NEXT: ldrh r0, [sp, #2]
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; CHECK-NEXT: add sp, sp, #4
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; CHECK-NEXT: bx lr
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;
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; CHECK-FP16-LABEL: bitcast_zero:
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; CHECK-FP16: @ %bb.0:
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; CHECK-FP16-NEXT: mov r0, #0
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; CHECK-FP16-NEXT: vmov.f16 s0, r0
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; CHECK-FP16-NEXT: vmov r0, s0
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; CHECK-FP16-NEXT: bx lr
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;
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; CHECK-HARD-LABEL: bitcast_zero:
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; CHECK-HARD: @ %bb.0:
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; CHECK-HARD-NEXT: .pad #4
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; CHECK-HARD-NEXT: sub sp, sp, #4
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; CHECK-HARD-NEXT: mov r0, #0
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; CHECK-HARD-NEXT: strh r0, [sp, #2]
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; CHECK-HARD-NEXT: ldrh r0, [sp, #2]
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; CHECK-HARD-NEXT: vmov s0, r0
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; CHECK-HARD-NEXT: add sp, sp, #4
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; CHECK-HARD-NEXT: bx lr
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%z = bitcast i16 0 to bfloat
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ret bfloat %z
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}
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define bfloat @zero() {
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; CHECK-LABEL: zero:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: adr r0, .LCPI1_0
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; CHECK-NEXT: ldrh r0, [r0]
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; CHECK-NEXT: bx lr
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; CHECK-NEXT: .p2align 1
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; CHECK-NEXT: @ %bb.1:
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; CHECK-NEXT: .LCPI1_0:
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; CHECK-NEXT: .short 0x0000 @ bfloat 0
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;
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; CHECK-FP16-LABEL: zero:
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; CHECK-FP16: @ %bb.0:
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; CHECK-FP16-NEXT: vldr.16 s0, .LCPI1_0
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; CHECK-FP16-NEXT: vmov r0, s0
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; CHECK-FP16-NEXT: bx lr
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; CHECK-FP16-NEXT: .p2align 1
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; CHECK-FP16-NEXT: @ %bb.1:
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; CHECK-FP16-NEXT: .LCPI1_0:
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; CHECK-FP16-NEXT: .short 0x0000 @ bfloat 0
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;
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; CHECK-HARD-LABEL: zero:
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; CHECK-HARD: @ %bb.0:
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; CHECK-HARD-NEXT: adr r0, .LCPI1_0
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; CHECK-HARD-NEXT: ldrh r0, [r0]
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; CHECK-HARD-NEXT: vmov s0, r0
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; CHECK-HARD-NEXT: bx lr
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; CHECK-HARD-NEXT: .p2align 1
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; CHECK-HARD-NEXT: @ %bb.1:
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; CHECK-HARD-NEXT: .LCPI1_0:
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; CHECK-HARD-NEXT: .short 0x0000 @ bfloat 0
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ret bfloat 0xR0000
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}
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define bfloat @bitcast_tenk() {
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; CHECK-LABEL: bitcast_tenk:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: .pad #4
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; CHECK-NEXT: sub sp, sp, #4
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; CHECK-NEXT: movw r0, #10000
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; CHECK-NEXT: strh r0, [sp, #2]
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; CHECK-NEXT: ldrh r0, [sp, #2]
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; CHECK-NEXT: add sp, sp, #4
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; CHECK-NEXT: bx lr
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;
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; CHECK-FP16-LABEL: bitcast_tenk:
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; CHECK-FP16: @ %bb.0:
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; CHECK-FP16-NEXT: movw r0, #10000
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; CHECK-FP16-NEXT: vmov.f16 s0, r0
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; CHECK-FP16-NEXT: vmov r0, s0
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; CHECK-FP16-NEXT: bx lr
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;
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; CHECK-HARD-LABEL: bitcast_tenk:
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; CHECK-HARD: @ %bb.0:
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; CHECK-HARD-NEXT: .pad #4
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; CHECK-HARD-NEXT: sub sp, sp, #4
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; CHECK-HARD-NEXT: movw r0, #10000
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; CHECK-HARD-NEXT: strh r0, [sp, #2]
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; CHECK-HARD-NEXT: ldrh r0, [sp, #2]
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; CHECK-HARD-NEXT: vmov s0, r0
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; CHECK-HARD-NEXT: add sp, sp, #4
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; CHECK-HARD-NEXT: bx lr
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%z = bitcast i16 10000 to bfloat
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ret bfloat %z
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}
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define bfloat @minus0() {
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; CHECK-LABEL: minus0:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: adr r0, .LCPI3_0
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; CHECK-NEXT: ldrh r0, [r0]
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; CHECK-NEXT: bx lr
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; CHECK-NEXT: .p2align 1
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; CHECK-NEXT: @ %bb.1:
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; CHECK-NEXT: .LCPI3_0:
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; CHECK-NEXT: .short 0x8000 @ bfloat -0
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;
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; CHECK-FP16-LABEL: minus0:
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; CHECK-FP16: @ %bb.0:
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; CHECK-FP16-NEXT: vldr.16 s0, .LCPI3_0
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; CHECK-FP16-NEXT: vmov r0, s0
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; CHECK-FP16-NEXT: bx lr
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; CHECK-FP16-NEXT: .p2align 1
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; CHECK-FP16-NEXT: @ %bb.1:
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; CHECK-FP16-NEXT: .LCPI3_0:
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; CHECK-FP16-NEXT: .short 0x8000 @ bfloat -0
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;
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; CHECK-HARD-LABEL: minus0:
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; CHECK-HARD: @ %bb.0:
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; CHECK-HARD-NEXT: adr r0, .LCPI3_0
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; CHECK-HARD-NEXT: ldrh r0, [r0]
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; CHECK-HARD-NEXT: vmov s0, r0
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; CHECK-HARD-NEXT: bx lr
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; CHECK-HARD-NEXT: .p2align 1
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; CHECK-HARD-NEXT: @ %bb.1:
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; CHECK-HARD-NEXT: .LCPI3_0:
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; CHECK-HARD-NEXT: .short 0x8000 @ bfloat -0
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ret bfloat 0xR8000
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}
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