llvm-project/llvm/test/CodeGen/ARM/fp-arg-shuffle.ll
Oliver Stannard c1eb790cd2 [ARM] Tail-calls do not require caller and callee arguments to match
The ARM backend was checking that the outgoing values for a tail-call
matched the incoming argument values of the caller. This isn't
necessary, because the caller can change the values in both registers
and the stack before doing the tail-call. The actual limitation is that
the callee can't need more stack space for it's arguments than the
caller does.

This is needed for code using the musttail attribute, as well as
enabling tail calls as an optimisation in more cases.
2024-10-25 09:34:08 +01:00

34 lines
1.3 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc -mtriple=arm-eabi -mattr=+neon -float-abi=soft %s -o - | FileCheck %s
; CHECK: function1
define double @function1(double %a, double %b, double %c, double %d, double %e, double %f) nounwind noinline ssp {
; CHECK-LABEL: function1:
; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: .save {r4, r5, r11, lr}
; CHECK-NEXT: push {r4, r5, r11, lr}
; CHECK-NEXT: vldr d16, [sp, #40]
; CHECK-NEXT: vldr d17, [sp, #32]
; CHECK-NEXT: vmov r12, lr, d16
; CHECK-NEXT: vldr d16, [sp, #16]
; CHECK-NEXT: vmov r4, r5, d17
; CHECK-NEXT: vldr d17, [sp, #24]
; CHECK-NEXT: str r3, [sp, #36]
; CHECK-NEXT: str r2, [sp, #32]
; CHECK-NEXT: str r1, [sp, #44]
; CHECK-NEXT: str r0, [sp, #40]
; CHECK-NEXT: vstr d17, [sp, #16]
; CHECK-NEXT: vstr d16, [sp, #24]
; CHECK-NEXT: mov r0, r12
; CHECK-NEXT: mov r1, lr
; CHECK-NEXT: mov r2, r4
; CHECK-NEXT: mov r3, r5
; CHECK-NEXT: pop {r4, r5, r11, lr}
; CHECK-NEXT: b function2
entry:
%call = tail call double @function2(double %f, double %e, double %d, double %c, double %b, double %a) nounwind
ret double %call
}
declare double @function2(double, double, double, double, double, double)