4c3e1e3c4a
... matching what we have in the disassembler. This isn't turned on by default since several of the scheduling models are not completely accurate, and we don't want to be misleading.
17 lines
776 B
LLVM
17 lines
776 B
LLVM
; RUN: llc -mtriple=thumb-none-eabi %s -o - -mcpu=cortex-m0 -asm-print-latency=1 | FileCheck %s --match-full-lines --check-prefix=ON
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; RUN: llc -mtriple=thumb-none-eabi %s -o - -mcpu=cortex-m0 -asm-print-latency=0 | FileCheck %s --match-full-lines --check-prefix=OFF
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; RUN: llc -mtriple=thumb-none-eabi %s -o - -mcpu=cortex-m0 | FileCheck %s --match-full-lines --check-prefix=OFF
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define i64 @load_i64(ptr %ptr){
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; ON: ldr r2, [r0] @ Latency: 4
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; ON: ldr r1, [r0, #4] @ Latency: 4
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; ON: mov r0, r2 @ Latency: 2
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; ON: bx lr
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; OFF: ldr r2, [r0]
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; OFF: ldr r1, [r0, #4]
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; OFF: mov r0, r2
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; OFf: bx lr
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%a = load i64, ptr %ptr
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ret i64 %a
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}
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