Peter Rong ee31a4a702 [ARM] IselLowering unsigned overflow to crash using APInt in PerformSHLSimplify
This diff fixes issue https://github.com/llvm/llvm-project/issues/59317

We should check if bitwidth is lower than the shift amount before we subtract them to avoid unsigned overflow.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D139238
2022-12-06 09:58:27 -08:00

26 lines
728 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=arm %s -o - | FileCheck --check-prefix=arm %s
; RUN: llc -mtriple=armeb %s -o - | FileCheck --check-prefix=armeb %s
define i1 @pr59317(i16 %F) {
; arm-LABEL: pr59317:
; arm: @ %bb.0: @ %BB
; arm-NEXT: sub sp, sp, #8
; arm-NEXT: mov r0, #0
; arm-NEXT: add sp, sp, #8
; arm-NEXT: mov pc, lr
;
; armeb-LABEL: pr59317:
; armeb: @ %bb.0: @ %BB
; armeb-NEXT: sub sp, sp, #8
; armeb-NEXT: mov r0, #0
; armeb-NEXT: add sp, sp, #8
; armeb-NEXT: mov pc, lr
BB:
%E = extractelement <1 x i16> <i16 -1>, i16 %F
%RP = alloca i64, align 8
%B = shl i16 %E, %E
%C1 = icmp ugt i16 %B, %F
ret i1 %C1
}