132 lines
3.7 KiB
LLVM
132 lines
3.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=armv7-unknown-eabi %s -o - | FileCheck %s
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define i8 @ucmp_8_8(i8 zeroext %x, i8 zeroext %y) nounwind {
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; CHECK-LABEL: ucmp_8_8:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: subs r0, r0, r1
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; CHECK-NEXT: movwhi r0, #1
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; CHECK-NEXT: mvnlo r0, #0
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; CHECK-NEXT: bx lr
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%1 = call i8 @llvm.ucmp(i8 %x, i8 %y)
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ret i8 %1
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}
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define i8 @ucmp_8_16(i16 zeroext %x, i16 zeroext %y) nounwind {
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; CHECK-LABEL: ucmp_8_16:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: subs r0, r0, r1
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; CHECK-NEXT: movwhi r0, #1
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; CHECK-NEXT: mvnlo r0, #0
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; CHECK-NEXT: bx lr
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%1 = call i8 @llvm.ucmp(i16 %x, i16 %y)
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ret i8 %1
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}
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define i8 @ucmp_8_32(i32 %x, i32 %y) nounwind {
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; CHECK-LABEL: ucmp_8_32:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: subs r0, r0, r1
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; CHECK-NEXT: movwhi r0, #1
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; CHECK-NEXT: mvnlo r0, #0
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; CHECK-NEXT: bx lr
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%1 = call i8 @llvm.ucmp(i32 %x, i32 %y)
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ret i8 %1
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}
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define i8 @ucmp_8_64(i64 %x, i64 %y) nounwind {
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; CHECK-LABEL: ucmp_8_64:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: .save {r11, lr}
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; CHECK-NEXT: push {r11, lr}
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; CHECK-NEXT: subs lr, r0, r2
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; CHECK-NEXT: mov r12, #0
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; CHECK-NEXT: sbcs lr, r1, r3
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; CHECK-NEXT: mov lr, #0
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; CHECK-NEXT: movwlo lr, #1
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; CHECK-NEXT: subs r0, r2, r0
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; CHECK-NEXT: sbcs r0, r3, r1
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; CHECK-NEXT: movwlo r12, #1
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; CHECK-NEXT: sub r0, r12, lr
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; CHECK-NEXT: pop {r11, pc}
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%1 = call i8 @llvm.ucmp(i64 %x, i64 %y)
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ret i8 %1
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}
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define i8 @ucmp_8_128(i128 %x, i128 %y) nounwind {
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; CHECK-LABEL: ucmp_8_128:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: .save {r4, r5, r6, r7, r11, lr}
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; CHECK-NEXT: push {r4, r5, r6, r7, r11, lr}
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; CHECK-NEXT: ldr r4, [sp, #24]
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; CHECK-NEXT: mov r5, #0
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; CHECK-NEXT: ldr r6, [sp, #28]
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; CHECK-NEXT: subs r7, r0, r4
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; CHECK-NEXT: ldr r12, [sp, #32]
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; CHECK-NEXT: sbcs r7, r1, r6
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; CHECK-NEXT: ldr lr, [sp, #36]
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; CHECK-NEXT: sbcs r7, r2, r12
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; CHECK-NEXT: sbcs r7, r3, lr
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; CHECK-NEXT: mov r7, #0
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; CHECK-NEXT: movwlo r7, #1
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; CHECK-NEXT: subs r0, r4, r0
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; CHECK-NEXT: sbcs r0, r6, r1
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; CHECK-NEXT: sbcs r0, r12, r2
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; CHECK-NEXT: sbcs r0, lr, r3
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; CHECK-NEXT: movwlo r5, #1
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; CHECK-NEXT: sub r0, r5, r7
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; CHECK-NEXT: pop {r4, r5, r6, r7, r11, pc}
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%1 = call i8 @llvm.ucmp(i128 %x, i128 %y)
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ret i8 %1
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}
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define i32 @ucmp_32_32(i32 %x, i32 %y) nounwind {
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; CHECK-LABEL: ucmp_32_32:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: subs r0, r0, r1
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; CHECK-NEXT: movwhi r0, #1
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; CHECK-NEXT: mvnlo r0, #0
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; CHECK-NEXT: bx lr
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%1 = call i32 @llvm.ucmp(i32 %x, i32 %y)
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ret i32 %1
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}
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define i32 @ucmp_32_64(i64 %x, i64 %y) nounwind {
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; CHECK-LABEL: ucmp_32_64:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: .save {r11, lr}
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; CHECK-NEXT: push {r11, lr}
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; CHECK-NEXT: subs lr, r0, r2
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; CHECK-NEXT: mov r12, #0
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; CHECK-NEXT: sbcs lr, r1, r3
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; CHECK-NEXT: mov lr, #0
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; CHECK-NEXT: movwlo lr, #1
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; CHECK-NEXT: subs r0, r2, r0
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; CHECK-NEXT: sbcs r0, r3, r1
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; CHECK-NEXT: movwlo r12, #1
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; CHECK-NEXT: sub r0, r12, lr
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; CHECK-NEXT: pop {r11, pc}
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%1 = call i32 @llvm.ucmp(i64 %x, i64 %y)
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ret i32 %1
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}
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define i64 @ucmp_64_64(i64 %x, i64 %y) nounwind {
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; CHECK-LABEL: ucmp_64_64:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: .save {r11, lr}
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; CHECK-NEXT: push {r11, lr}
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; CHECK-NEXT: subs lr, r0, r2
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; CHECK-NEXT: mov r12, #0
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; CHECK-NEXT: sbcs lr, r1, r3
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; CHECK-NEXT: mov lr, #0
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; CHECK-NEXT: movwlo lr, #1
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; CHECK-NEXT: subs r0, r2, r0
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; CHECK-NEXT: sbcs r0, r3, r1
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; CHECK-NEXT: movwlo r12, #1
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; CHECK-NEXT: sub r0, r12, lr
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; CHECK-NEXT: asr r1, r0, #31
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; CHECK-NEXT: pop {r11, pc}
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%1 = call i64 @llvm.ucmp(i64 %x, i64 %y)
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ret i64 %1
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}
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