
fixes #140321 Specifically it fixes ` error: Cannot create BufferLoad operation: Invalid overload type` https://hlsl.godbolt.org/z/dTq4q7o58 but no new DML shaders are building. This change now exposes #144747. The change does two things it adds i64 support for intrinsic expansion for the `dx_resource_load_typedbuffer`, and `dx_resource_store_typedbuffer` intrinsics. It also lets loaded typedbuffers crash more gracefully because of ` auto *EVI = cast<ExtractValueInst>(U);` is now a `dyn_cast` and `llvm_unreachable`.
39 lines
2.5 KiB
LLVM
39 lines
2.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -S -dxil-intrinsic-expansion %s | FileCheck %s
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target triple = "dxil-pc-shadermodel6.6-compute"
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define void @storei64(i64 %0) {
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; CHECK-LABEL: define void @storei64(
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; CHECK-SAME: i64 [[TMP0:%.*]]) {
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; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
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; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP0]] to i32
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; CHECK-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP0]], 32
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; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i32
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; CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[TMP2]], i32 0
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; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[TMP4]], i32 1
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; CHECK-NEXT: call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_i64_1_0_0t.v2i32(target("dx.TypedBuffer", i64, 1, 0, 0) [[BUFFER]], i32 0, <2 x i32> [[TMP6]])
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; CHECK-NEXT: ret void
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;
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%buffer = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
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call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_i64_1_0_0t(target("dx.TypedBuffer", i64, 1, 0, 0) %buffer, i32 0,i64 %0)
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ret void
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}
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define void @storev2i64(<2 x i64> %0) {
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; CHECK-LABEL: define void @storev2i64(
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; CHECK-SAME: <2 x i64> [[TMP0:%.*]]) {
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; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
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; CHECK-NEXT: [[TMP2:%.*]] = trunc <2 x i64> [[TMP0]] to <2 x i32>
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; CHECK-NEXT: [[TMP3:%.*]] = lshr <2 x i64> [[TMP0]], splat (i64 32)
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; CHECK-NEXT: [[TMP4:%.*]] = trunc <2 x i64> [[TMP3]] to <2 x i32>
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; CHECK-NEXT: [[TMP13:%.*]] = shufflevector <2 x i32> [[TMP2]], <2 x i32> [[TMP4]], <4 x i32> <i32 0, i32 2, i32 1, i32 3>
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; CHECK-NEXT: call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_v2i64_1_0_0t.v4i32(target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) [[BUFFER]], i32 0, <4 x i32> [[TMP13]])
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; CHECK-NEXT: ret void
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;
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%buffer = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
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call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_v2i64_1_0_0t(target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) %buffer, i32 0, <2 x i64> %0)
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ret void
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}
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