369891b674
In most cases, the type information attached to load and store instructions is meaningless and inconsistently applied. We can usually use ".b" loads and avoid the complexity of trying to assign the correct type. The one expectation is sign-extending load, which will continue to use ".s" to ensure the sign extension into a larger register is done correctly.
108 lines
3.3 KiB
LLVM
108 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -o - < %s -mcpu=sm_70 -mattr=+ptx76 | FileCheck %s
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; RUN: %if ptxas %{ llc < %s -mcpu=sm_70 -mattr=+ptx76 | %ptxas-verify -arch=sm_70 %}
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target triple = "nvptx64-unknown-cuda"
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define i32 @szext_wrap_u32(i32 %a, i32 %b) {
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; CHECK-LABEL: szext_wrap_u32(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<4>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r1, [szext_wrap_u32_param_0];
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; CHECK-NEXT: ld.param.b32 %r2, [szext_wrap_u32_param_1];
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; CHECK-NEXT: szext.wrap.u32 %r3, %r1, %r2;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r3;
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; CHECK-NEXT: ret;
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%c = call i32 @llvm.nvvm.zext.wrap(i32 %a, i32 %b)
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ret i32 %c
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}
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define i32 @szext_clamp_u32(i32 %a, i32 %b) {
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; CHECK-LABEL: szext_clamp_u32(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<4>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r1, [szext_clamp_u32_param_0];
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; CHECK-NEXT: ld.param.b32 %r2, [szext_clamp_u32_param_1];
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; CHECK-NEXT: szext.clamp.u32 %r3, %r1, %r2;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r3;
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; CHECK-NEXT: ret;
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%c = call i32 @llvm.nvvm.zext.clamp(i32 %a, i32 %b)
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ret i32 %c
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}
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define i32 @szext_wrap_s32(i32 %a, i32 %b) {
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; CHECK-LABEL: szext_wrap_s32(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<4>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r1, [szext_wrap_s32_param_0];
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; CHECK-NEXT: ld.param.b32 %r2, [szext_wrap_s32_param_1];
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; CHECK-NEXT: szext.wrap.s32 %r3, %r1, %r2;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r3;
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; CHECK-NEXT: ret;
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%c = call i32 @llvm.nvvm.sext.wrap(i32 %a, i32 %b)
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ret i32 %c
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}
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define i32 @szext_clamp_s32(i32 %a, i32 %b) {
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; CHECK-LABEL: szext_clamp_s32(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<4>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r1, [szext_clamp_s32_param_0];
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; CHECK-NEXT: ld.param.b32 %r2, [szext_clamp_s32_param_1];
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; CHECK-NEXT: szext.clamp.s32 %r3, %r1, %r2;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r3;
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; CHECK-NEXT: ret;
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%c = call i32 @llvm.nvvm.sext.clamp(i32 %a, i32 %b)
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ret i32 %c
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}
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define i32 @szext_clamp_s32_ii() {
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; CHECK-LABEL: szext_clamp_s32_ii(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<3>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: mov.b32 %r1, 3;
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; CHECK-NEXT: szext.clamp.s32 %r2, %r1, 4;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r2;
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; CHECK-NEXT: ret;
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%c = call i32 @llvm.nvvm.sext.clamp(i32 3, i32 4)
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ret i32 %c
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}
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define i32 @szext_wrap_s32_ir(i32 %a) {
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; CHECK-LABEL: szext_wrap_s32_ir(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<3>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r1, [szext_wrap_s32_ir_param_0];
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; CHECK-NEXT: szext.wrap.s32 %r2, 5, %r1;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r2;
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; CHECK-NEXT: ret;
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%c = call i32 @llvm.nvvm.sext.wrap(i32 5, i32 %a)
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ret i32 %c
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}
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define i32 @szext_clamp_u32_ri(i32 %a) {
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; CHECK-LABEL: szext_clamp_u32_ri(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<3>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r1, [szext_clamp_u32_ri_param_0];
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; CHECK-NEXT: szext.clamp.u32 %r2, %r1, 7;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r2;
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; CHECK-NEXT: ret;
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%c = call i32 @llvm.nvvm.zext.clamp(i32 %a, i32 7)
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ret i32 %c
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}
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