llvm-project/llvm/test/CodeGen/NVPTX/vector-select.ll
Alex MacLean 369891b674
[NVPTX] use untyped loads and stores where ever possible (#137698)
In most cases, the type information attached to load and store
instructions is meaningless and inconsistently applied. We can usually
use ".b" loads and avoid the complexity of trying to assign the correct
type. The one expectation is sign-extending load, which will continue to
use ".s" to ensure the sign extension into a larger register is done
correctly.
2025-05-10 08:26:26 -07:00

28 lines
1.0 KiB
LLVM

; RUN: llc < %s -mtriple=nvptx -mcpu=sm_20 | FileCheck %s
; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 | FileCheck %s
; RUN: %if ptxas && !ptxas-12.0 %{ llc < %s -mtriple=nvptx -mcpu=sm_20 | %ptxas-verify %}
; RUN: %if ptxas %{llc < %s -mtriple=nvptx64 -mcpu=sm_20 | %ptxas-verify %}
; This test makes sure that vector selects are scalarized by the type legalizer.
; If not, type legalization will fail.
; CHECK-LABEL: .visible .func foo(
define void @foo(ptr addrspace(1) %def_a, ptr addrspace(1) %def_b, ptr addrspace(1) %def_c) {
entry:
; CHECK: ld.global.v2.b32
; CHECK: ld.global.v2.b32
; CHECK: ld.global.v2.b32
%tmp4 = load <2 x i32>, ptr addrspace(1) %def_a
%tmp6 = load <2 x i32>, ptr addrspace(1) %def_c
%tmp8 = load <2 x i32>, ptr addrspace(1) %def_b
; CHECK: setp.gt.s32
; CHECK: setp.gt.s32
%0 = icmp sge <2 x i32> %tmp4, zeroinitializer
; CHECK: selp.b32
; CHECK: selp.b32
%cond = select <2 x i1> %0, <2 x i32> %tmp6, <2 x i32> %tmp8
; CHECK: st.global.v2.b32
store <2 x i32> %cond, ptr addrspace(1) %def_c
ret void
}