369891b674
In most cases, the type information attached to load and store instructions is meaningless and inconsistently applied. We can usually use ".b" loads and avoid the complexity of trying to assign the correct type. The one expectation is sign-extending load, which will continue to use ".s" to ensure the sign extension into a larger register is done correctly.
32 lines
1.2 KiB
LLVM
32 lines
1.2 KiB
LLVM
; RUN: llc < %s | FileCheck %s
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; RUN: %if ptxas %{ llc < %s | %ptxas-verify %}
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target triple = "nvptx64-nvidia-cuda"
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; CHECK-LABEL: test1
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; CHECK: ld.global.v2.b32
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; CHECK: ld.global.v2.b32
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; CHECK: st.global.v2.b32
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; CHECK: st.global.v2.b32
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define void @test1(ptr addrspace(1) noalias align 8 %in, ptr addrspace(1) noalias align 8 %out) {
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%in.1 = getelementptr float, ptr addrspace(1) %in, i32 1
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%in.2 = getelementptr float, ptr addrspace(1) %in, i32 2
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%in.3 = getelementptr float, ptr addrspace(1) %in, i32 3
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%v0 = load float, ptr addrspace(1) %in, align 8
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%v1 = load float, ptr addrspace(1) %in.1, align 4
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%v2 = load float, ptr addrspace(1) %in.2, align 8
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%v3 = load float, ptr addrspace(1) %in.3, align 4
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%sum0 = fadd float %v0, %v1
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%sum1 = fadd float %v1, %v2
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%sum2 = fadd float %v3, %v1
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%sum3 = fadd float %v2, %v3
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%out.1 = getelementptr float, ptr addrspace(1) %out, i32 1
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%out.2 = getelementptr float, ptr addrspace(1) %out, i32 2
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%out.3 = getelementptr float, ptr addrspace(1) %out, i32 3
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store float %sum0, ptr addrspace(1) %out, align 8
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store float %sum1, ptr addrspace(1) %out.1, align 4
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store float %sum2, ptr addrspace(1) %out.2, align 8
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store float %sum3, ptr addrspace(1) %out.3, align 4
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ret void
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}
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