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llvm-project/llvm/test/CodeGen/Xtensa/atomic-load-store.ll
Andrei Safronov 3ffaaf6db6
[Xtensa] Implement Xtensa S32C1I Option and atomics lowering. (#137134) 
Implement Xtensa S32C1I Option. Implement atomic_cmp_swap_32 operation
using s32c1i instruction. Use atomic_cmp_swap_32 operation and AtomicExpand
pass to implement atomics operations.
2025-08-06 17:43:27 +03:00

499 lines
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=xtensa -mattr=+windowed < %s | FileCheck %s --check-prefixes=XTENSA
; RUN: llc -mtriple=xtensa -mattr=+windowed,s32c1i < %s | FileCheck %s --check-prefixes=XTENSA-ATOMIC
define i8 @atomic_load_i8_unordered(ptr %a) nounwind {
; XTENSA-LABEL: atomic_load_i8_unordered:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a11, 0
; XTENSA-NEXT: l32r a8, .LCPI0_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: or a2, a10, a10
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_load_i8_unordered:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: l8ui a2, a2, 0
; XTENSA-ATOMIC-NEXT: retw
%1 = load atomic i8, ptr %a unordered, align 1
ret i8 %1
}
define i8 @atomic_load_i8_monotonic(ptr %a) nounwind {
; XTENSA-LABEL: atomic_load_i8_monotonic:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a11, 0
; XTENSA-NEXT: l32r a8, .LCPI1_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: or a2, a10, a10
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_load_i8_monotonic:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: l8ui a2, a2, 0
; XTENSA-ATOMIC-NEXT: retw
%1 = load atomic i8, ptr %a monotonic, align 1
ret i8 %1
}
define i8 @atomic_load_i8_acquire(ptr %a) nounwind {
; XTENSA-LABEL: atomic_load_i8_acquire:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a11, 2
; XTENSA-NEXT: l32r a8, .LCPI2_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: or a2, a10, a10
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_load_i8_acquire:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: l8ui a2, a2, 0
; XTENSA-ATOMIC-NEXT: memw
; XTENSA-ATOMIC-NEXT: retw
%1 = load atomic i8, ptr %a acquire, align 1
ret i8 %1
}
define i8 @atomic_load_i8_seq_cst(ptr %a) nounwind {
; XTENSA-LABEL: atomic_load_i8_seq_cst:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a11, 5
; XTENSA-NEXT: l32r a8, .LCPI3_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: or a2, a10, a10
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_load_i8_seq_cst:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: l8ui a2, a2, 0
; XTENSA-ATOMIC-NEXT: memw
; XTENSA-ATOMIC-NEXT: retw
%1 = load atomic i8, ptr %a seq_cst, align 1
ret i8 %1
}
define i16 @atomic_load_i16_unordered(ptr %a) nounwind {
; XTENSA-LABEL: atomic_load_i16_unordered:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a11, 0
; XTENSA-NEXT: l32r a8, .LCPI4_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: or a2, a10, a10
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_load_i16_unordered:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: l16ui a2, a2, 0
; XTENSA-ATOMIC-NEXT: retw
%1 = load atomic i16, ptr %a unordered, align 2
ret i16 %1
}
define i16 @atomic_load_i16_monotonic(ptr %a) nounwind {
; XTENSA-LABEL: atomic_load_i16_monotonic:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a11, 0
; XTENSA-NEXT: l32r a8, .LCPI5_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: or a2, a10, a10
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_load_i16_monotonic:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: l16ui a2, a2, 0
; XTENSA-ATOMIC-NEXT: retw
%1 = load atomic i16, ptr %a monotonic, align 2
ret i16 %1
}
define i16 @atomic_load_i16_acquire(ptr %a) nounwind {
; XTENSA-LABEL: atomic_load_i16_acquire:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a11, 2
; XTENSA-NEXT: l32r a8, .LCPI6_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: or a2, a10, a10
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_load_i16_acquire:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: l16ui a2, a2, 0
; XTENSA-ATOMIC-NEXT: memw
; XTENSA-ATOMIC-NEXT: retw
%1 = load atomic i16, ptr %a acquire, align 2
ret i16 %1
}
define i16 @atomic_load_i16_seq_cst(ptr %a) nounwind {
; XTENSA-LABEL: atomic_load_i16_seq_cst:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a11, 5
; XTENSA-NEXT: l32r a8, .LCPI7_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: or a2, a10, a10
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_load_i16_seq_cst:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: l16ui a2, a2, 0
; XTENSA-ATOMIC-NEXT: memw
; XTENSA-ATOMIC-NEXT: retw
%1 = load atomic i16, ptr %a seq_cst, align 2
ret i16 %1
}
define i32 @atomic_load_i32_unordered(ptr %a) nounwind {
; XTENSA-LABEL: atomic_load_i32_unordered:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a11, 0
; XTENSA-NEXT: l32r a8, .LCPI8_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: or a2, a10, a10
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_load_i32_unordered:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: l32i a2, a2, 0
; XTENSA-ATOMIC-NEXT: retw
%1 = load atomic i32, ptr %a unordered, align 4
ret i32 %1
}
define i32 @atomic_load_i32_monotonic(ptr %a) nounwind {
; XTENSA-LABEL: atomic_load_i32_monotonic:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a11, 0
; XTENSA-NEXT: l32r a8, .LCPI9_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: or a2, a10, a10
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_load_i32_monotonic:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: l32i a2, a2, 0
; XTENSA-ATOMIC-NEXT: retw
%1 = load atomic i32, ptr %a monotonic, align 4
ret i32 %1
}
define i32 @atomic_load_i32_acquire(ptr %a) nounwind {
; XTENSA-LABEL: atomic_load_i32_acquire:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a11, 2
; XTENSA-NEXT: l32r a8, .LCPI10_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: or a2, a10, a10
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_load_i32_acquire:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: l32i a2, a2, 0
; XTENSA-ATOMIC-NEXT: memw
; XTENSA-ATOMIC-NEXT: retw
%1 = load atomic i32, ptr %a acquire, align 4
ret i32 %1
}
define i32 @atomic_load_i32_seq_cst(ptr %a) nounwind {
; XTENSA-LABEL: atomic_load_i32_seq_cst:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a11, 5
; XTENSA-NEXT: l32r a8, .LCPI11_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: or a2, a10, a10
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_load_i32_seq_cst:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: l32i a2, a2, 0
; XTENSA-ATOMIC-NEXT: memw
; XTENSA-ATOMIC-NEXT: retw
%1 = load atomic i32, ptr %a seq_cst, align 4
ret i32 %1
}
define void @atomic_store_i8_unordered(ptr %a, i8 %b) nounwind {
; XTENSA-LABEL: atomic_store_i8_unordered:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a11, a3, a3
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a12, 0
; XTENSA-NEXT: l32r a8, .LCPI12_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_store_i8_unordered:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: s8i a3, a2, 0
; XTENSA-ATOMIC-NEXT: retw
store atomic i8 %b, ptr %a unordered, align 1
ret void
}
define void @atomic_store_i8_monotonic(ptr %a, i8 %b) nounwind {
; XTENSA-LABEL: atomic_store_i8_monotonic:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a11, a3, a3
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a12, 0
; XTENSA-NEXT: l32r a8, .LCPI13_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_store_i8_monotonic:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: s8i a3, a2, 0
; XTENSA-ATOMIC-NEXT: retw
store atomic i8 %b, ptr %a monotonic, align 1
ret void
}
define void @atomic_store_i8_release(ptr %a, i8 %b) nounwind {
; XTENSA-LABEL: atomic_store_i8_release:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a11, a3, a3
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a12, 3
; XTENSA-NEXT: l32r a8, .LCPI14_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_store_i8_release:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: memw
; XTENSA-ATOMIC-NEXT: s8i a3, a2, 0
; XTENSA-ATOMIC-NEXT: retw
store atomic i8 %b, ptr %a release, align 1
ret void
}
define void @atomic_store_i8_seq_cst(ptr %a, i8 %b) nounwind {
; XTENSA-LABEL: atomic_store_i8_seq_cst:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a11, a3, a3
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a12, 5
; XTENSA-NEXT: l32r a8, .LCPI15_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_store_i8_seq_cst:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: memw
; XTENSA-ATOMIC-NEXT: s8i a3, a2, 0
; XTENSA-ATOMIC-NEXT: memw
; XTENSA-ATOMIC-NEXT: retw
store atomic i8 %b, ptr %a seq_cst, align 1
ret void
}
define void @atomic_store_i16_unordered(ptr %a, i16 %b) nounwind {
; XTENSA-LABEL: atomic_store_i16_unordered:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a11, a3, a3
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a12, 0
; XTENSA-NEXT: l32r a8, .LCPI16_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_store_i16_unordered:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: s16i a3, a2, 0
; XTENSA-ATOMIC-NEXT: retw
store atomic i16 %b, ptr %a unordered, align 2
ret void
}
define void @atomic_store_i16_monotonic(ptr %a, i16 %b) nounwind {
; XTENSA-LABEL: atomic_store_i16_monotonic:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a11, a3, a3
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a12, 0
; XTENSA-NEXT: l32r a8, .LCPI17_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_store_i16_monotonic:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: s16i a3, a2, 0
; XTENSA-ATOMIC-NEXT: retw
store atomic i16 %b, ptr %a monotonic, align 2
ret void
}
define void @atomic_store_i16_release(ptr %a, i16 %b) nounwind {
; XTENSA-LABEL: atomic_store_i16_release:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a11, a3, a3
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a12, 3
; XTENSA-NEXT: l32r a8, .LCPI18_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_store_i16_release:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: memw
; XTENSA-ATOMIC-NEXT: s16i a3, a2, 0
; XTENSA-ATOMIC-NEXT: retw
store atomic i16 %b, ptr %a release, align 2
ret void
}
define void @atomic_store_i16_seq_cst(ptr %a, i16 %b) nounwind {
; XTENSA-LABEL: atomic_store_i16_seq_cst:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a11, a3, a3
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a12, 5
; XTENSA-NEXT: l32r a8, .LCPI19_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_store_i16_seq_cst:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: memw
; XTENSA-ATOMIC-NEXT: s16i a3, a2, 0
; XTENSA-ATOMIC-NEXT: memw
; XTENSA-ATOMIC-NEXT: retw
store atomic i16 %b, ptr %a seq_cst, align 2
ret void
}
define void @atomic_store_i32_unordered(ptr %a, i32 %b) nounwind {
; XTENSA-LABEL: atomic_store_i32_unordered:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a11, a3, a3
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a12, 0
; XTENSA-NEXT: l32r a8, .LCPI20_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_store_i32_unordered:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: s32i a3, a2, 0
; XTENSA-ATOMIC-NEXT: retw
store atomic i32 %b, ptr %a unordered, align 4
ret void
}
define void @atomic_store_i32_monotonic(ptr %a, i32 %b) nounwind {
; XTENSA-LABEL: atomic_store_i32_monotonic:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a11, a3, a3
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a12, 0
; XTENSA-NEXT: l32r a8, .LCPI21_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_store_i32_monotonic:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: s32i a3, a2, 0
; XTENSA-ATOMIC-NEXT: retw
store atomic i32 %b, ptr %a monotonic, align 4
ret void
}
define void @atomic_store_i32_release(ptr %a, i32 %b) nounwind {
; XTENSA-LABEL: atomic_store_i32_release:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a11, a3, a3
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a12, 3
; XTENSA-NEXT: l32r a8, .LCPI22_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_store_i32_release:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: memw
; XTENSA-ATOMIC-NEXT: s32i a3, a2, 0
; XTENSA-ATOMIC-NEXT: retw
store atomic i32 %b, ptr %a release, align 4
ret void
}
define void @atomic_store_i32_seq_cst(ptr %a, i32 %b) nounwind {
; XTENSA-LABEL: atomic_store_i32_seq_cst:
; XTENSA: # %bb.0:
; XTENSA-NEXT: entry a1, 32
; XTENSA-NEXT: or a11, a3, a3
; XTENSA-NEXT: or a10, a2, a2
; XTENSA-NEXT: movi a12, 5
; XTENSA-NEXT: l32r a8, .LCPI23_0
; XTENSA-NEXT: callx8 a8
; XTENSA-NEXT: retw
;
; XTENSA-ATOMIC-LABEL: atomic_store_i32_seq_cst:
; XTENSA-ATOMIC: # %bb.0:
; XTENSA-ATOMIC-NEXT: entry a1, 32
; XTENSA-ATOMIC-NEXT: memw
; XTENSA-ATOMIC-NEXT: s32i a3, a2, 0
; XTENSA-ATOMIC-NEXT: memw
; XTENSA-ATOMIC-NEXT: retw
store atomic i32 %b, ptr %a seq_cst, align 4
ret void
}
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