224 lines
5.0 KiB
LLVM
224 lines
5.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=xtensa -disable-block-placement -verify-machineinstrs < %s \
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; RUN: | FileCheck %s
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define i32 @brcc_sgt(i32 %a, i32 %b) nounwind {
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; CHECK-LABEL: brcc_sgt:
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; CHECK: bge a3, a2, .LBB0_2
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; CHECK-NEXT: # %bb.1: # %t1
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; CHECK-NEXT: addi a2, a2, 4
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB0_2: # %t2
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; CHECK-NEXT: addi a2, a3, 8
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; CHECK-NEXT: ret
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%wb = icmp sgt i32 %a, %b
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br i1 %wb, label %t1, label %t2
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t1:
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%t1v = add i32 %a, 4
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br label %exit
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t2:
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%t2v = add i32 %b, 8
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br label %exit
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exit:
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%v = phi i32 [ %t1v, %t1 ], [ %t2v, %t2 ]
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ret i32 %v
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}
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define i32 @brcc_ugt(i32 %a, i32 %b) nounwind {
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; CHECK-LABEL: brcc_ugt:
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; CHECK: bgeu a3, a2, .LBB1_2
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; CHECK-NEXT: # %bb.1: # %t1
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; CHECK-NEXT: addi a2, a2, 4
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB1_2: # %t2
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; CHECK-NEXT: addi a2, a3, 8
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; CHECK-NEXT: ret
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%wb = icmp ugt i32 %a, %b
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br i1 %wb, label %t1, label %t2
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t1:
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%t1v = add i32 %a, 4
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br label %exit
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t2:
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%t2v = add i32 %b, 8
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br label %exit
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exit:
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%v = phi i32 [ %t1v, %t1 ], [ %t2v, %t2 ]
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ret i32 %v
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}
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define i32 @brcc_sle(i32 %a, i32 %b) nounwind {
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; CHECK-LABEL: brcc_sle:
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; CHECK: blt a3, a2, .LBB2_2
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; CHECK-NEXT: # %bb.1: # %t1
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; CHECK-NEXT: addi a2, a2, 4
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB2_2: # %t2
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; CHECK-NEXT: addi a2, a3, 8
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; CHECK-NEXT: ret
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%wb = icmp sle i32 %a, %b
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br i1 %wb, label %t1, label %t2
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t1:
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%t1v = add i32 %a, 4
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br label %exit
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t2:
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%t2v = add i32 %b, 8
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br label %exit
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exit:
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%v = phi i32 [ %t1v, %t1 ], [ %t2v, %t2 ]
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ret i32 %v
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}
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define i32 @brcc_ule(i32 %a, i32 %b) nounwind {
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; CHECK-LABEL: brcc_ule:
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; CHECK: bltu a3, a2, .LBB3_2
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; CHECK-NEXT: # %bb.1: # %t1
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; CHECK-NEXT: addi a2, a2, 4
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB3_2: # %t2
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; CHECK-NEXT: addi a2, a3, 8
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; CHECK-NEXT: ret
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%wb = icmp ule i32 %a, %b
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br i1 %wb, label %t1, label %t2
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t1:
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%t1v = add i32 %a, 4
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br label %exit
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t2:
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%t2v = add i32 %b, 8
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br label %exit
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exit:
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%v = phi i32 [ %t1v, %t1 ], [ %t2v, %t2 ]
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ret i32 %v
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}
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define i32 @brcc_eq(i32 %a, i32 %b) nounwind {
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; CHECK-LABEL: brcc_eq:
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; CHECK: bne a2, a3, .LBB4_2
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; CHECK-NEXT: # %bb.1: # %t1
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; CHECK-NEXT: addi a2, a2, 4
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB4_2: # %t2
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; CHECK-NEXT: addi a2, a3, 8
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; CHECK-NEXT: ret
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%wb = icmp eq i32 %a, %b
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br i1 %wb, label %t1, label %t2
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t1:
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%t1v = add i32 %a, 4
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br label %exit
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t2:
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%t2v = add i32 %b, 8
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br label %exit
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exit:
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%v = phi i32 [ %t1v, %t1 ], [ %t2v, %t2 ]
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ret i32 %v
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}
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define i32 @brcc_ne(i32 %a, i32 %b) nounwind {
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; CHECK-LABEL: brcc_ne:
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; CHECK: beq a2, a3, .LBB5_2
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; CHECK-NEXT: # %bb.1: # %t1
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; CHECK-NEXT: addi a2, a2, 4
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB5_2: # %t2
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; CHECK-NEXT: addi a2, a3, 8
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; CHECK-NEXT: ret
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%wb = icmp ne i32 %a, %b
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br i1 %wb, label %t1, label %t2
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t1:
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%t1v = add i32 %a, 4
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br label %exit
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t2:
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%t2v = add i32 %b, 8
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br label %exit
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exit:
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%v = phi i32 [ %t1v, %t1 ], [ %t2v, %t2 ]
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ret i32 %v
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}
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define i32 @brcc_ge(i32 %a, i32 %b) nounwind {
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; CHECK-LABEL: brcc_ge:
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; CHECK: blt a2, a3, .LBB6_2
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; CHECK-NEXT: # %bb.1: # %t1
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; CHECK-NEXT: addi a2, a2, 4
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB6_2: # %t2
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; CHECK-NEXT: addi a2, a3, 8
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; CHECK-NEXT: ret
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%wb = icmp sge i32 %a, %b
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br i1 %wb, label %t1, label %t2
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t1:
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%t1v = add i32 %a, 4
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br label %exit
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t2:
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%t2v = add i32 %b, 8
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br label %exit
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exit:
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%v = phi i32 [ %t1v, %t1 ], [ %t2v, %t2 ]
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ret i32 %v
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}
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define i32 @brcc_lt(i32 %a, i32 %b) nounwind {
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; CHECK-LABEL: brcc_lt:
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; CHECK: bge a2, a3, .LBB7_2
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; CHECK-NEXT: # %bb.1: # %t1
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; CHECK-NEXT: addi a2, a2, 4
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB7_2: # %t2
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; CHECK-NEXT: addi a2, a3, 8
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; CHECK-NEXT: ret
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%wb = icmp slt i32 %a, %b
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br i1 %wb, label %t1, label %t2
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t1:
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%t1v = add i32 %a, 4
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br label %exit
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t2:
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%t2v = add i32 %b, 8
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br label %exit
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exit:
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%v = phi i32 [ %t1v, %t1 ], [ %t2v, %t2 ]
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ret i32 %v
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}
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define i32 @brcc_uge(i32 %a, i32 %b) nounwind {
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; CHECK-LABEL: brcc_uge:
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; CHECK: bltu a2, a3, .LBB8_2
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; CHECK-NEXT: # %bb.1: # %t1
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; CHECK-NEXT: addi a2, a2, 4
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB8_2: # %t2
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; CHECK-NEXT: addi a2, a3, 8
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; CHECK-NEXT: ret
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%wb = icmp uge i32 %a, %b
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br i1 %wb, label %t1, label %t2
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t1:
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%t1v = add i32 %a, 4
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br label %exit
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t2:
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%t2v = add i32 %b, 8
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br label %exit
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exit:
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%v = phi i32 [ %t1v, %t1 ], [ %t2v, %t2 ]
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ret i32 %v
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}
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define i32 @brcc_ult(i32 %a, i32 %b) nounwind {
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; CHECK-LABEL: brcc_ult:
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; CHECK: bgeu a2, a3, .LBB9_2
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; CHECK-NEXT: # %bb.1: # %t1
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; CHECK-NEXT: addi a2, a2, 4
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB9_2: # %t2
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; CHECK-NEXT: addi a2, a3, 8
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; CHECK-NEXT: ret
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%wb = icmp ult i32 %a, %b
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br i1 %wb, label %t1, label %t2
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t1:
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%t1v = add i32 %a, 4
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br label %exit
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t2:
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%t2v = add i32 %b, 8
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br label %exit
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exit:
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%v = phi i32 [ %t1v, %t1 ], [ %t2v, %t2 ]
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ret i32 %v
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}
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