48da8489f2
Add Xtensa esp32 and esp8266 cpus. Implement target parser to recognise Xtensa hardware features.
30 lines
1.0 KiB
LLVM
30 lines
1.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; This tests that llc accepts all valid Xtensa CPUs
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; RUN: llc < %s --mtriple=xtensa --mcpu=esp8266 2>&1 | FileCheck -check-prefix=XTENSA-ESP8266 %s
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; RUN: llc < %s --mtriple=xtensa --mcpu=esp32 2>&1 | FileCheck -check-prefix=XTENSA-ESP32 %s
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; RUN: llc < %s --mtriple=xtensa --mcpu=generic 2>&1 | FileCheck -check-prefix=XTENSA-GENERIC %s
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define i32 @f(i32 %z) {
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; XTENSA-ESP8266-LABEL: f:
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; XTENSA-ESP8266: .cfi_startproc
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; XTENSA-ESP8266-NEXT: # %bb.0:
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; XTENSA-ESP8266-NEXT: movi a2, 0
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; XTENSA-ESP8266-NEXT: ret
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;
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; XTENSA-ESP32-LABEL: f:
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; XTENSA-ESP32: .cfi_startproc
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; XTENSA-ESP32-NEXT: # %bb.0:
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; XTENSA-ESP32-NEXT: entry a1, 32
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; XTENSA-ESP32-NEXT: .cfi_def_cfa_offset 32
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; XTENSA-ESP32-NEXT: movi a2, 0
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; XTENSA-ESP32-NEXT: retw.n
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;
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; XTENSA-GENERIC-LABEL: f:
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; XTENSA-GENERIC: .cfi_startproc
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; XTENSA-GENERIC-NEXT: # %bb.0:
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; XTENSA-GENERIC-NEXT: movi a2, 0
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; XTENSA-GENERIC-NEXT: ret
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ret i32 0
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}
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