a4c6ebeb20
RFC: https://discourse.llvm.org/t/rfc-extend-machine-value-type-from-uint8-t-to-uint16-t/80274 compile-time-tracker: https://llvm-compile-time-tracker.com/compare.php?from=4b9fab591916eec9fd1942f37afe3b137b564089&to=177d28247efe5a4d59a8d8150b4daf01e4f57d74&stat=wall-time Currently 208 out of 256 MVTs are used, it will be run out soon, so ultimately we need to extend the original `MVT::SimpleValueType` from `uint8_t` to `uint16_t` to accomodate more types. The `MatcherTable` uses `unsigned char` for encoding the matcher code, so the extended MVTs are no longer fit into the table, thus we need to use VBR to encode them as we do on others that are wider than 8 bits. The statistics below shows the difference of "Total Array size" of the matcher table that appears in every files: ``` Table Before After Change(%) WebAssemblyGenDAGISel.inc 23576 23775 0.844 NVPTXGenDAGISel.inc 173498 173498 0 RISCVGenDAGISel.inc 2179121 2369929 8.756 AVRGenDAGISel.inc 2754 2754 0 PPCGenDAGISel.inc 163315 163617 0.185 MipsGenDAGISel.inc 47280 47447 0.353 SystemZGenDAGISel.inc 56243 56461 0.388 AArch64GenDAGISel.inc 467893 487830 4.261 MSP430GenDAGISel.inc 8069 8069 0 LoongArchGenDAGISel.inc 78928 79131 0.257 XCoreGenDAGISel.inc 3432 3432 0 BPFGenDAGISel.inc 3733 3733 0 VEGenDAGISel.inc 65174 66456 1.967 LanaiGenDAGISel.inc 2067 2067 0 X86GenDAGISel.inc 628787 636987 1.304 ARMGenDAGISel.inc 170968 171036 0.040 HexagonGenDAGISel.inc 155764 155764 0 SparcGenDAGISel.inc 5762 5798 0.625 AMDGPUGenDAGISel.inc 504356 504463 0.021 R600GenDAGISel.inc 29785 29785 0 ``` The statistics below shows the runtime peak memory usage by compiling a simple C program: `/bin/time -v clang -target $TARGET -O3 -c test.c` ``` int test(int a) { return a * 3; } ``` ``` Target Before(kbytes) After(kbytes) Change(%) wasm64 110172 110088 -0.076 nvptx64 109784 109980 0.179 riscv64 114020 113656 -0.319 avr 110352 110068 -0.257 ppc64 112612 112476 -0.120 mips64 113588 113668 0.070 systemz 110860 110760 -0.090 aarch64 113704 113432 -0.239 msp430 110284 110200 -0.076 loongarch64 111052 110756 -0.267 xcore 108340 108020 -0.295 bpf 110620 110708 0.080 ve 110960 110920 -0.036 lanai 110180 109960 -0.200 x86_64 113640 113304 -0.296 arm64 113540 113172 -0.324 hexagon 114620 114684 0.056 sparc 110412 110136 -0.250 amdgcn 118164 117144 -0.863 r600 111200 110508 -0.622 ```
40 lines
1.3 KiB
TableGen
40 lines
1.3 KiB
TableGen
// RUN: llvm-tblgen -gen-dag-isel -I %p/../../include %s | FileCheck %s
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include "llvm/Target/Target.td"
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def TestTargetInstrInfo : InstrInfo;
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def TestTarget : Target {
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let InstructionSet = TestTargetInstrInfo;
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}
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let Namespace = "TestNamespace" in {
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def R0 : Register<"r0">;
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foreach i = 0...127 in {
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def GPR#i : RegisterClass<"TestTarget", [i32], 32,
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(add R0)>;
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}
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def GPRAbove127 : RegisterClass<"TestTarget", [i32], 32,
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(add R0)>;
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} // end Namespace TestNamespace
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// CHECK: OPC_CheckOpcode, TARGET_VAL(ISD::ADD),
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// CHECK-NEXT: OPC_RecordChild0, // #0 = $src
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// CHECK-NEXT: OPC_Scope, 12, /*->18*/ // 2 children in Scope
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// CHECK-NEXT: OPC_CheckChild1Integer, 0,
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// CHECK-NEXT: OPC_EmitInteger32, 0|128,2/*256*/,
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// CHECK-NEXT: OPC_MorphNodeTo1None, TARGET_VAL(TargetOpcode::COPY_TO_REGCLASS),
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// CHECK-NEXT: /*MVT::i32*/7, 2/*#Ops*/, 1, 0,
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def : Pat<(i32 (add i32:$src, (i32 0))),
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(COPY_TO_REGCLASS GPRAbove127, GPR0:$src)>;
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// CHECK: OPC_CheckChild1Integer, 2,
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// CHECK-NEXT: OPC_EmitStringInteger32, TestNamespace::GPR127RegClassID,
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// CHECK-NEXT: OPC_MorphNodeTo1None, TARGET_VAL(TargetOpcode::COPY_TO_REGCLASS),
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// CHECK-NEXT: /*MVT::i32*/7, 2/*#Ops*/, 1, 0,
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def : Pat<(i32 (add i32:$src, (i32 1))),
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(COPY_TO_REGCLASS GPR127, GPR0:$src)>;
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