7d2b6f0b35
IndVars may replace an instruction with one of its operands, if they have the same SCEV expression. However, such a replacement may be more poisonous. First, check whether the operand being poison implies that the instruction is also poison, in which case the replacement is always safe. If this fails, check whether SCEV can determine that reusing the instruction is safe, using the same check as SCEVExpander. Fixes https://github.com/llvm/llvm-project/issues/79861.
108 lines
3.2 KiB
LLVM
108 lines
3.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
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; RUN: opt -S -passes=indvars < %s | FileCheck %s
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target datalayout = "n64"
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declare void @use(i64)
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define void @or_disjoint() {
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; CHECK-LABEL: define void @or_disjoint() {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 2, [[ENTRY:%.*]] ], [ [[IV_DEC:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[OR:%.*]] = or disjoint i64 [[IV]], 1
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i64 [[IV]], 1
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; CHECK-NEXT: [[SEL:%.*]] = select i1 false, i64 [[OR]], i64 [[ADD]]
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; CHECK-NEXT: call void @use(i64 [[SEL]])
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; CHECK-NEXT: [[IV_DEC]] = add nsw i64 [[IV]], -1
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; CHECK-NEXT: [[EXIT_COND:%.*]] = icmp eq i64 [[IV_DEC]], 0
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; CHECK-NEXT: br i1 [[EXIT_COND]], label [[EXIT:%.*]], label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 2, %entry ], [ %iv.dec, %loop ]
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%or = or disjoint i64 %iv, 1
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%add = add nsw i64 %iv, 1
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%sel = select i1 false, i64 %or, i64 %add
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call void @use(i64 %sel)
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%iv.dec = add nsw i64 %iv, -1
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%exit.cond = icmp eq i64 %iv.dec, 0
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br i1 %exit.cond, label %exit, label %loop
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exit:
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ret void
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}
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define void @add_nowrap_flags(i64 %n) {
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; CHECK-LABEL: define void @add_nowrap_flags(
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; CHECK-SAME: i64 [[N:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_INC:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[ADD1:%.*]] = add i64 [[IV]], 123
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; CHECK-NEXT: call void @use(i64 [[ADD1]])
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; CHECK-NEXT: [[IV_INC]] = add i64 [[IV]], 1
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; CHECK-NEXT: [[EXIT_COND:%.*]] = icmp eq i64 [[IV_INC]], [[N]]
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; CHECK-NEXT: br i1 [[EXIT_COND]], label [[EXIT:%.*]], label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.inc, %loop ]
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%add1 = add nuw nsw i64 %iv, 123
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%add2 = add i64 %iv, 123
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%sel = select i1 false, i64 %add1, i64 %add2
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call void @use(i64 %sel)
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%iv.inc = add i64 %iv, 1
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%exit.cond = icmp eq i64 %iv.inc, %n
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br i1 %exit.cond, label %exit, label %loop
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exit:
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ret void
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}
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define void @expander_or_disjoint(i64 %n) {
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; CHECK-LABEL: define void @expander_or_disjoint(
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; CHECK-SAME: i64 [[N:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[OR:%.*]] = or disjoint i64 [[N]], 1
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; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[N]], 1
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_INC:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[IV_INC]] = add i64 [[IV]], 1
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; CHECK-NEXT: [[ADD:%.*]] = add i64 [[IV]], [[OR]]
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; CHECK-NEXT: call void @use(i64 [[ADD]])
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[IV_INC]], [[TMP0]]
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%or = or disjoint i64 %n, 1
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.inc, %loop ]
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%iv.inc = add i64 %iv, 1
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%add = add i64 %iv, %or
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call void @use(i64 %add)
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%cmp = icmp ult i64 %iv, %n
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br i1 %cmp, label %loop, label %exit
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exit:
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ret void
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}
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