d77067d08a
This adds support for using dominating conditions in computeKnownBits() when called from InstCombine. The implementation uses a DomConditionCache, which stores which branches may provide information that is relevant for a given value. DomConditionCache is similar to AssumptionCache, but does not try to do any kind of automatic tracking. Relevant branches have to be explicitly registered and invalidated values explicitly removed. The necessary tracking is done inside InstCombine. The reason why this doesn't just do exactly the same thing as AssumptionCache is that a lot more transforms touch branches and branch conditions than assumptions. AssumptionCache is an immutable analysis and mostly gets away with this because only a handful of places have to register additional assumptions (mostly as a result of cloning). This is very much not the case for branches. This change regresses compile-time by about ~0.2%. It also improves stage2-O0-g builds by about ~0.2%, which indicates that this change results in additional optimizations inside clang itself. Fixes https://github.com/llvm/llvm-project/issues/74242.
53 lines
1.6 KiB
LLVM
53 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
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; RUN: opt -passes=instcombine -S < %s | FileCheck %s
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; RUN: opt -passes=instcombine,simplifycfg,instcombine -S < %s | FileCheck %s --check-prefix=EXTRA-PASSES
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; Check that code corresponding to the following C function is
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; simplified into a single ASR operation:
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;
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; int test_asr(int a, int b) {
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; return a < 0 ? -(-a - 1 >> b) - 1 : a >> b;
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; }
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;
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define i32 @test_asr(i32 %a, i32 %b) {
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; CHECK-LABEL: define i32 @test_asr(
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; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[A]], 0
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; CHECK-NEXT: br i1 [[C]], label [[BB2:%.*]], label [[BB3:%.*]]
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; CHECK: bb2:
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; CHECK-NEXT: [[NOT2:%.*]] = ashr i32 [[A]], [[B]]
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; CHECK-NEXT: br label [[BB4:%.*]]
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; CHECK: bb3:
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; CHECK-NEXT: [[E:%.*]] = lshr i32 [[A]], [[B]]
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; CHECK-NEXT: br label [[BB4]]
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; CHECK: bb4:
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; CHECK-NEXT: [[F:%.*]] = phi i32 [ [[NOT2]], [[BB2]] ], [ [[E]], [[BB3]] ]
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; CHECK-NEXT: ret i32 [[F]]
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;
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; EXTRA-PASSES-LABEL: define i32 @test_asr(
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; EXTRA-PASSES-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
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; EXTRA-PASSES-NEXT: entry:
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; EXTRA-PASSES-NEXT: [[C1:%.*]] = ashr i32 [[A]], [[B]]
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; EXTRA-PASSES-NEXT: ret i32 [[C1]]
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;
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entry:
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%c = icmp slt i32 %a, 0
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br i1 %c, label %bb2, label %bb3
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bb2:
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%t1 = sub i32 0, %a
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%not = sub i32 %t1, 1
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%d = ashr i32 %not, %b
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%t2 = sub i32 0, %d
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%not2 = sub i32 %t2, 1
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br label %bb4
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bb3:
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%e = ashr i32 %a, %b
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br label %bb4
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bb4:
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%f = phi i32 [ %not2, %bb2 ], [ %e, %bb3 ]
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ret i32 %f
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}
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