334a046a3c
Emit safety guards for ptr accesses when cross partition loads exist which have a corresponding store to the same address in a different partition. This will emit the necessary ptr checks for these accesses. The test case was obtained from SuperTest, which SiFive runs regularly. We enabled LoopDistribution by default in our downstream compiler, this change was part of that enablement.
160 lines
10 KiB
LLVM
160 lines
10 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -aa-pipeline=basic-aa -passes=loop-distribute -enable-loop-distribute -verify-loop-info -verify-dom-info -S %s | FileCheck %s
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; Test emit safety guards for ptr access of %a and %c on a cross parition load which
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; has a corresponding store to the same address. This ensures that if %a and %c
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; overlap in some scenarios, that we execute the original loop for safety reasons.
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define dso_local void @_Z13distribution3PiS_S_S_i(ptr nocapture noundef %a, ptr nocapture noundef readonly %b, ptr nocapture noundef %c, ptr nocapture noundef writeonly %d, i64 noundef signext %len) {
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; CHECK-LABEL: define dso_local void @_Z13distribution3PiS_S_S_i(
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; CHECK-SAME: ptr noundef captures(none) [[A:%.*]], ptr noundef readonly captures(none) [[B:%.*]], ptr noundef captures(none) [[C:%.*]], ptr noundef writeonly captures(none) [[D:%.*]], i64 noundef signext [[LEN:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[LEN]], 0
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; CHECK-NEXT: br i1 [[CMP]], label %[[END:.*]], label %[[FOR_BODY_LVER_CHECK:.*]]
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; CHECK: [[FOR_BODY_LVER_CHECK]]:
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; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[LEN]], 2
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; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP0]]
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; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[C]], i64 -4
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; CHECK-NEXT: [[SCEVGEP5:%.*]] = getelementptr i8, ptr [[C]], i64 [[TMP0]]
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; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[D]], i64 [[TMP0]]
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; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP0]]
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; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[A]], [[SCEVGEP5]]
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; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[SCEVGEP]], [[SCEVGEP2]]
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; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND1]], [[BOUND0]]
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; CHECK-NEXT: [[BOUND07:%.*]] = icmp ult ptr [[A]], [[SCEVGEP3]]
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; CHECK-NEXT: [[BOUND18:%.*]] = icmp ult ptr [[D]], [[SCEVGEP2]]
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; CHECK-NEXT: [[FOUND_CONFLICT9:%.*]] = and i1 [[BOUND07]], [[BOUND18]]
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; CHECK-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT9]]
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; CHECK-NEXT: [[BOUND010:%.*]] = icmp ult ptr [[A]], [[SCEVGEP4]]
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; CHECK-NEXT: [[BOUND111:%.*]] = icmp ult ptr [[B]], [[SCEVGEP2]]
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; CHECK-NEXT: [[FOUND_CONFLICT12:%.*]] = and i1 [[BOUND010]], [[BOUND111]]
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; CHECK-NEXT: [[CONFLICT_RDX13:%.*]] = or i1 [[CONFLICT_RDX]], [[FOUND_CONFLICT12]]
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; CHECK-NEXT: [[BOUND014:%.*]] = icmp ult ptr [[SCEVGEP]], [[SCEVGEP3]]
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; CHECK-NEXT: [[BOUND115:%.*]] = icmp ult ptr [[D]], [[SCEVGEP5]]
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; CHECK-NEXT: [[FOUND_CONFLICT16:%.*]] = and i1 [[BOUND014]], [[BOUND115]]
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; CHECK-NEXT: [[CONFLICT_RDX17:%.*]] = or i1 [[CONFLICT_RDX13]], [[FOUND_CONFLICT16]]
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; CHECK-NEXT: [[BOUND018:%.*]] = icmp ult ptr [[D]], [[SCEVGEP4]]
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; CHECK-NEXT: [[BOUND119:%.*]] = icmp ult ptr [[B]], [[SCEVGEP3]]
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; CHECK-NEXT: [[FOUND_CONFLICT20:%.*]] = and i1 [[BOUND018]], [[BOUND119]]
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; CHECK-NEXT: [[CONFLICT_RDX21:%.*]] = or i1 [[CONFLICT_RDX17]], [[FOUND_CONFLICT20]]
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; CHECK-NEXT: br i1 [[CONFLICT_RDX21]], label %[[FOR_BODY_PH_LVER_ORIG:.*]], label %[[FOR_BODY_PH_LDIST1:.*]]
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; CHECK: [[FOR_BODY_PH_LVER_ORIG]]:
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; CHECK-NEXT: br label %[[FOR_BODY_LVER_ORIG:.*]]
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; CHECK: [[FOR_BODY_LVER_ORIG]]:
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; CHECK-NEXT: [[IDXPROM_LVER_ORIG:%.*]] = phi i64 [ 0, %[[FOR_BODY_PH_LVER_ORIG]] ], [ [[I6_LVER_ORIG:%.*]], %[[FOR_BODY_LVER_ORIG]] ]
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; CHECK-NEXT: [[ARRAYIDX_LVER_ORIG:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IDXPROM_LVER_ORIG]]
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; CHECK-NEXT: [[I2_LVER_ORIG:%.*]] = load i32, ptr [[ARRAYIDX_LVER_ORIG]], align 4, !tbaa [[TBAA0:![0-9]+]]
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; CHECK-NEXT: [[ADD4_LVER_ORIG:%.*]] = add nsw i32 [[I2_LVER_ORIG]], 1
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; CHECK-NEXT: [[ARRAYIDX8_LVER_ORIG:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IDXPROM_LVER_ORIG]]
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; CHECK-NEXT: store i32 [[ADD4_LVER_ORIG]], ptr [[ARRAYIDX8_LVER_ORIG]], align 4, !tbaa [[TBAA0]]
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; CHECK-NEXT: [[I3_LVER_ORIG:%.*]] = getelementptr i32, ptr [[C]], i64 [[IDXPROM_LVER_ORIG]]
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; CHECK-NEXT: [[ARRAYIDX17_LVER_ORIG:%.*]] = getelementptr i8, ptr [[I3_LVER_ORIG]], i64 -4
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; CHECK-NEXT: [[I4_LVER_ORIG:%.*]] = load i32, ptr [[ARRAYIDX17_LVER_ORIG]], align 4, !tbaa [[TBAA0]]
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; CHECK-NEXT: [[SUB18_LVER_ORIG:%.*]] = sub nsw i32 [[ADD4_LVER_ORIG]], [[I4_LVER_ORIG]]
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; CHECK-NEXT: store i32 [[SUB18_LVER_ORIG]], ptr [[I3_LVER_ORIG]], align 4, !tbaa [[TBAA0]]
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; CHECK-NEXT: [[I5_LVER_ORIG:%.*]] = load i32, ptr [[ARRAYIDX8_LVER_ORIG]], align 4, !tbaa [[TBAA0]]
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; CHECK-NEXT: [[ADD27_LVER_ORIG:%.*]] = add nsw i32 [[I5_LVER_ORIG]], 2
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; CHECK-NEXT: [[ARRAYIDX31_LVER_ORIG:%.*]] = getelementptr inbounds i32, ptr [[D]], i64 [[IDXPROM_LVER_ORIG]]
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; CHECK-NEXT: store i32 [[ADD27_LVER_ORIG]], ptr [[ARRAYIDX31_LVER_ORIG]], align 4, !tbaa [[TBAA0]]
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; CHECK-NEXT: [[I6_LVER_ORIG]] = add i64 [[IDXPROM_LVER_ORIG]], 1
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; CHECK-NEXT: [[CMP1_NOT_LVER_ORIG:%.*]] = icmp eq i64 [[I6_LVER_ORIG]], [[LEN]]
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; CHECK-NEXT: br i1 [[CMP1_NOT_LVER_ORIG]], label %[[END_LOOPEXIT_LOOPEXIT:.*]], label %[[FOR_BODY_LVER_ORIG]], !llvm.loop [[LOOP4:![0-9]+]]
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; CHECK: [[FOR_BODY_PH_LDIST1]]:
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; CHECK-NEXT: br label %[[FOR_BODY_LDIST1:.*]]
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; CHECK: [[FOR_BODY_LDIST1]]:
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; CHECK-NEXT: [[IDXPROM_LDIST1:%.*]] = phi i64 [ 0, %[[FOR_BODY_PH_LDIST1]] ], [ [[I6_LDIST1:%.*]], %[[FOR_BODY_LDIST1]] ]
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; CHECK-NEXT: [[ARRAYIDX_LDIST1:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IDXPROM_LDIST1]]
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; CHECK-NEXT: [[I2_LDIST1:%.*]] = load i32, ptr [[ARRAYIDX_LDIST1]], align 4, !tbaa [[TBAA0]], !alias.scope [[META6:![0-9]+]]
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; CHECK-NEXT: [[ADD4_LDIST1:%.*]] = add nsw i32 [[I2_LDIST1]], 1
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; CHECK-NEXT: [[ARRAYIDX8_LDIST1:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IDXPROM_LDIST1]]
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; CHECK-NEXT: store i32 [[ADD4_LDIST1]], ptr [[ARRAYIDX8_LDIST1]], align 4, !tbaa [[TBAA0]], !alias.scope [[META9:![0-9]+]], !noalias [[META11:![0-9]+]]
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; CHECK-NEXT: [[I3_LDIST1:%.*]] = getelementptr i32, ptr [[C]], i64 [[IDXPROM_LDIST1]]
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; CHECK-NEXT: [[ARRAYIDX17_LDIST1:%.*]] = getelementptr i8, ptr [[I3_LDIST1]], i64 -4
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; CHECK-NEXT: [[I4_LDIST1:%.*]] = load i32, ptr [[ARRAYIDX17_LDIST1]], align 4, !tbaa [[TBAA0]], !alias.scope [[META14:![0-9]+]], !noalias [[META15:![0-9]+]]
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; CHECK-NEXT: [[SUB18_LDIST1:%.*]] = sub nsw i32 [[ADD4_LDIST1]], [[I4_LDIST1]]
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; CHECK-NEXT: store i32 [[SUB18_LDIST1]], ptr [[I3_LDIST1]], align 4, !tbaa [[TBAA0]], !alias.scope [[META14]], !noalias [[META15]]
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; CHECK-NEXT: [[I6_LDIST1]] = add i64 [[IDXPROM_LDIST1]], 1
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; CHECK-NEXT: [[CMP1_NOT_LDIST1:%.*]] = icmp eq i64 [[I6_LDIST1]], [[LEN]]
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; CHECK-NEXT: br i1 [[CMP1_NOT_LDIST1]], label %[[FOR_BODY_PH:.*]], label %[[FOR_BODY_LDIST1]], !llvm.loop [[LOOP16:![0-9]+]]
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; CHECK: [[FOR_BODY_PH]]:
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; CHECK-NEXT: br label %[[FOR_BODY:.*]]
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; CHECK: [[FOR_BODY]]:
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; CHECK-NEXT: [[IDXPROM:%.*]] = phi i64 [ 0, %[[FOR_BODY_PH]] ], [ [[I6:%.*]], %[[FOR_BODY]] ]
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; CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IDXPROM]]
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; CHECK-NEXT: [[I5:%.*]] = load i32, ptr [[ARRAYIDX8]], align 4, !tbaa [[TBAA0]], !alias.scope [[META9]], !noalias [[META11]]
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; CHECK-NEXT: [[ADD27:%.*]] = add nsw i32 [[I5]], 2
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; CHECK-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds i32, ptr [[D]], i64 [[IDXPROM]]
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; CHECK-NEXT: store i32 [[ADD27]], ptr [[ARRAYIDX31]], align 4, !tbaa [[TBAA0]], !alias.scope [[META15]], !noalias [[META6]]
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; CHECK-NEXT: [[I6]] = add i64 [[IDXPROM]], 1
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; CHECK-NEXT: [[CMP1_NOT:%.*]] = icmp eq i64 [[I6]], [[LEN]]
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; CHECK-NEXT: br i1 [[CMP1_NOT]], label %[[END_LOOPEXIT_LOOPEXIT20:.*]], label %[[FOR_BODY]], !llvm.loop [[LOOP16]]
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; CHECK: [[END_LOOPEXIT_LOOPEXIT]]:
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; CHECK-NEXT: br label %[[END_LOOPEXIT:.*]]
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; CHECK: [[END_LOOPEXIT_LOOPEXIT20]]:
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; CHECK-NEXT: br label %[[END_LOOPEXIT]]
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; CHECK: [[END_LOOPEXIT]]:
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; CHECK-NEXT: br label %[[END]]
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; CHECK: [[END]]:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp = icmp sgt i64 %len, 0
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br i1 %cmp, label %end, label %for.body.preheader
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for.body.preheader: ; preds = %entry
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br label %for.body
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for.body: ; preds = %for.body, %for.body.preheader
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%indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]
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%arrayidx = getelementptr inbounds i32, ptr %b, i64 %indvars.iv
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%i2 = load i32, ptr %arrayidx, align 4, !tbaa !0
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%add4 = add nsw i32 %i2, 1
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%arrayidx8 = getelementptr inbounds i32, ptr %a, i64 %indvars.iv
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store i32 %add4, ptr %arrayidx8, align 4, !tbaa !0
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%i3 = getelementptr i32, ptr %c, i64 %indvars.iv
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%arrayidx17 = getelementptr i8, ptr %i3, i64 -4
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%i4 = load i32, ptr %arrayidx17, align 4, !tbaa !0
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%sub18 = sub nsw i32 %add4, %i4
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store i32 %sub18, ptr %i3, align 4, !tbaa !0
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%i5 = load i32, ptr %arrayidx8, align 4, !tbaa !0
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%add27 = add nsw i32 %i5, 2
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%arrayidx31 = getelementptr inbounds i32, ptr %d, i64 %indvars.iv
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store i32 %add27, ptr %arrayidx31, align 4, !tbaa !0
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%indvars.iv.next = add i64 %indvars.iv, 1
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%cmp1.not = icmp eq i64 %indvars.iv.next, %len
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br i1 %cmp1.not, label %end.loopexit, label %for.body, !llvm.loop !4
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end.loopexit: ; preds = %for.body
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br label %end
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end: ; preds = %end.loopexit, %entry
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ret void
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}
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!0 = !{!1, !1, i64 0}
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!1 = !{!"int", !2, i64 0}
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!2 = !{!"omnipotent char", !3, i64 0}
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!3 = !{!"Simple C++ TBAA"}
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!4 = distinct !{!4, !5}
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!5 = !{!"llvm.loop.mustprogress"}
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;.
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; CHECK: [[TBAA0]] = !{[[META1:![0-9]+]], [[META1]], i64 0}
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; CHECK: [[META1]] = !{!"int", [[META2:![0-9]+]], i64 0}
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; CHECK: [[META2]] = !{!"omnipotent char", [[META3:![0-9]+]], i64 0}
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; CHECK: [[META3]] = !{!"Simple C++ TBAA"}
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; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META5:![0-9]+]]}
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; CHECK: [[META5]] = !{!"llvm.loop.mustprogress"}
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; CHECK: [[META6]] = !{[[META7:![0-9]+]]}
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; CHECK: [[META7]] = distinct !{[[META7]], [[META8:![0-9]+]]}
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; CHECK: [[META8]] = distinct !{[[META8]], !"LVerDomain"}
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; CHECK: [[META9]] = !{[[META10:![0-9]+]]}
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; CHECK: [[META10]] = distinct !{[[META10]], [[META8]]}
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; CHECK: [[META11]] = !{[[META12:![0-9]+]], [[META13:![0-9]+]], [[META7]]}
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; CHECK: [[META12]] = distinct !{[[META12]], [[META8]]}
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; CHECK: [[META13]] = distinct !{[[META13]], [[META8]]}
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; CHECK: [[META14]] = !{[[META12]]}
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; CHECK: [[META15]] = !{[[META13]]}
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; CHECK: [[LOOP16]] = distinct !{[[LOOP16]], [[META5]]}
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;.
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