
This PR updates the `Verifier` to enforce that `alloca` instructions on AMDGPU must be in AS5. This prevents hitting a misleading backend error like "unable to select FrameIndex," which makes it look like a backend bug when it's actually an IR-level issue.
103 lines
4.9 KiB
LLVM
103 lines
4.9 KiB
LLVM
; RUN: not llvm-as %s --disable-output 2>&1 | FileCheck %s
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target triple = "amdgcn-amd-amdhsa"
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; CHECK: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.0 = alloca i32, align 4
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.1 = alloca i32, align 4, addrspace(1)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.2 = alloca i32, align 4, addrspace(2)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.3 = alloca i32, align 4, addrspace(3)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.4 = alloca i32, align 4, addrspace(4)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.6 = alloca i32, align 4, addrspace(6)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.7 = alloca i32, align 4, addrspace(7)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.8 = alloca i32, align 4, addrspace(8)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.9 = alloca i32, align 4, addrspace(9)
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define void @static_alloca() {
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entry:
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%alloca.0 = alloca i32, align 4
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%alloca.1 = alloca i32, align 4, addrspace(1)
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%alloca.2 = alloca i32, align 4, addrspace(2)
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%alloca.3 = alloca i32, align 4, addrspace(3)
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%alloca.4 = alloca i32, align 4, addrspace(4)
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%alloca.5 = alloca i32, align 4, addrspace(5)
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%alloca.6 = alloca i32, align 4, addrspace(6)
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%alloca.7 = alloca i32, align 4, addrspace(7)
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%alloca.8 = alloca i32, align 4, addrspace(8)
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%alloca.9 = alloca i32, align 4, addrspace(9)
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ret void
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}
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; CHECK: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.0 = alloca i32, i32 %n, align 4
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.1 = alloca i32, i32 %n, align 4, addrspace(1)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.2 = alloca i32, i32 %n, align 4, addrspace(2)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.3 = alloca i32, i32 %n, align 4, addrspace(3)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.4 = alloca i32, i32 %n, align 4, addrspace(4)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.6 = alloca i32, i32 %n, align 4, addrspace(6)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.7 = alloca i32, i32 %n, align 4, addrspace(7)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.8 = alloca i32, i32 %n, align 4, addrspace(8)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.9 = alloca i32, i32 %n, align 4, addrspace(9)
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define void @dynamic_alloca_i32(i32 %n) {
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entry:
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%alloca.0 = alloca i32, i32 %n, align 4
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%alloca.1 = alloca i32, i32 %n, align 4, addrspace(1)
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%alloca.2 = alloca i32, i32 %n, align 4, addrspace(2)
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%alloca.3 = alloca i32, i32 %n, align 4, addrspace(3)
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%alloca.4 = alloca i32, i32 %n, align 4, addrspace(4)
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%alloca.5 = alloca i32, i32 %n, align 4, addrspace(5)
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%alloca.6 = alloca i32, i32 %n, align 4, addrspace(6)
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%alloca.7 = alloca i32, i32 %n, align 4, addrspace(7)
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%alloca.8 = alloca i32, i32 %n, align 4, addrspace(8)
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%alloca.9 = alloca i32, i32 %n, align 4, addrspace(9)
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ret void
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}
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; CHECK: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.0 = alloca i32, i64 %n, align 4
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.1 = alloca i32, i64 %n, align 4, addrspace(1)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.2 = alloca i32, i64 %n, align 4, addrspace(2)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.3 = alloca i32, i64 %n, align 4, addrspace(3)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.4 = alloca i32, i64 %n, align 4, addrspace(4)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.6 = alloca i32, i64 %n, align 4, addrspace(6)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.7 = alloca i32, i64 %n, align 4, addrspace(7)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.8 = alloca i32, i64 %n, align 4, addrspace(8)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.9 = alloca i32, i64 %n, align 4, addrspace(9)
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define void @dynamic_alloca_i64(i64 %n) {
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entry:
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%alloca.0 = alloca i32, i64 %n, align 4
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%alloca.1 = alloca i32, i64 %n, align 4, addrspace(1)
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%alloca.2 = alloca i32, i64 %n, align 4, addrspace(2)
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%alloca.3 = alloca i32, i64 %n, align 4, addrspace(3)
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%alloca.4 = alloca i32, i64 %n, align 4, addrspace(4)
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%alloca.5 = alloca i32, i64 %n, align 4, addrspace(5)
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%alloca.6 = alloca i32, i64 %n, align 4, addrspace(6)
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%alloca.7 = alloca i32, i64 %n, align 4, addrspace(7)
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%alloca.8 = alloca i32, i64 %n, align 4, addrspace(8)
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%alloca.9 = alloca i32, i64 %n, align 4, addrspace(9)
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ret void
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}
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