a8e1311a1c
This is intended to solve a problem with lowering atomics in OpenMP and C++ common to AMDGPU and NVPTX. In OpenCL and CUDA, it is undefined behavior for an atomic instruction to modify an object in thread private memory. In OpenMP, it is defined. Correspondingly, the hardware does not handle this correctly. For AMDGPU, 32-bit atomics work and 64-bit atomics are silently dropped. We therefore need to codegen this by inserting a runtime address space check, performing the private case without atomics, and fallback to issuing the real atomic otherwise. This metadata allows us to avoid this extra check and branch. Handle this by introducing metadata intended to be applied to atomicrmw, indicating they cannot access the forbidden address space.
61 lines
1.8 KiB
LLVM
61 lines
1.8 KiB
LLVM
; RUN: not llvm-as < %s -o /dev/null 2>&1 | FileCheck %s
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; CHECK: It should have at least one range!
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; CHECK-NEXT: !0 = !{}
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define i64 @noalias_addrspace__empty(ptr %ptr, i64 %val) {
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%ret = atomicrmw add ptr %ptr, i64 %val seq_cst, !noalias.addrspace !0
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ret i64 %ret
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}
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; CHECK: Unfinished range!
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; CHECK-NEXT: !1 = !{i32 0}
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define i64 @noalias_addrspace__single_field(ptr %ptr, i64 %val) {
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%ret = atomicrmw add ptr %ptr, i64 %val seq_cst, !noalias.addrspace !1
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ret i64 %ret
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}
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; CHECK: Range must not be empty!
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; CHECK-NEXT: !2 = !{i32 0, i32 0}
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define i64 @noalias_addrspace__0_0(ptr %ptr, i64 %val) {
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%ret = atomicrmw add ptr %ptr, i64 %val seq_cst, !noalias.addrspace !2
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ret i64 %ret
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}
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; CHECK: noalias.addrspace type must be i32!
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; CHECK-NEXT: %ret = atomicrmw add ptr %ptr, i64 %val seq_cst, align 8, !noalias.addrspace !3
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define i64 @noalias_addrspace__i64(ptr %ptr, i64 %val) {
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%ret = atomicrmw add ptr %ptr, i64 %val seq_cst, !noalias.addrspace !3
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ret i64 %ret
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}
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; CHECK: The lower limit must be an integer!
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define i64 @noalias_addrspace__fp(ptr %ptr, i64 %val) {
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%ret = atomicrmw add ptr %ptr, i64 %val seq_cst, !noalias.addrspace !4
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ret i64 %ret
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}
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; CHECK: The lower limit must be an integer!
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define i64 @noalias_addrspace__ptr(ptr %ptr, i64 %val) {
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%ret = atomicrmw add ptr %ptr, i64 %val seq_cst, !noalias.addrspace !5
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ret i64 %ret
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}
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; CHECK: The lower limit must be an integer!
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define i64 @noalias_addrspace__nonconstant(ptr %ptr, i64 %val) {
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%ret = atomicrmw add ptr %ptr, i64 %val seq_cst, !noalias.addrspace !6
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ret i64 %ret
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}
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@gv0 = global i32 0
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@gv1 = global i32 1
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!0 = !{}
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!1 = !{i32 0}
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!2 = !{i32 0, i32 0}
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!3 = !{i64 1, i64 5}
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!4 = !{float 0.0, float 2.0}
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!5 = !{ptr null, ptr addrspace(1) null}
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!6 = !{i32 ptrtoint (ptr @gv0 to i32), i32 ptrtoint (ptr @gv1 to i32) }
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