214e6b40f8
This PR introduces support for inline assembly calls for SPIR-V Backend in general, and support for SPV_INTEL_inline_assembly [1] extension in particular. The former part of the PR is agnostic towards vendor-specific requirements and resolves the task of supporting successful transformation of inline assembly as long as it's possible without specific SPIR-V instruction codes. As a part of the PR there appears an opportunity to bring coherent inline assembly information up to latest passes of the transformation process (emitting final SPIR-V instructions), so that PR makes it easy to add any another required flavor of inline assembly, other then supported by the vendor specific SPV_INTEL_inline_assembly extension, if/when needed. At the moment, however, SPV_INTEL_inline_assembly is the only implemented way to bring LLVM IR inline assembly calls up to valid SPIR-V instructions and also the default one. This means that inline assembly calls will generate an error message of such extension is not used to prevent LLVM-generated error messages at the final stages of translation. When the SPV_INTEL_inline_assembly extension is mentioned among supported, translation of inline assembly is intercepted by this extension implementation on a pre-legalizer step, and this is a place where support for a new inline assembly extension may be added if needed. This PR also extends support for register classes, improves type inference during pre-legalizer pass, and fixes a minor bug with asm-printing of string literals. [1] https://github.com/intel/llvm/blob/sycl/sycl/doc/design/spirv-extensions/SPV_INTEL_inline_assembly.asciidoc
47 lines
1.7 KiB
C++
47 lines
1.7 KiB
C++
//===--- SPIRVInlineAsmLowering.cpp - Inline Asm lowering -------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the lowering of LLVM inline asm calls to machine code
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// calls for GlobalISel.
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//
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//===----------------------------------------------------------------------===//
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#include "SPIRVInlineAsmLowering.h"
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#include "SPIRVSubtarget.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/IntrinsicsSPIRV.h"
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using namespace llvm;
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SPIRVInlineAsmLowering::SPIRVInlineAsmLowering(const SPIRVTargetLowering &TLI)
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: InlineAsmLowering(&TLI) {}
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bool SPIRVInlineAsmLowering::lowerAsmOperandForConstraint(
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Value *Val, StringRef Constraint, std::vector<MachineOperand> &Ops,
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MachineIRBuilder &MIRBuilder) const {
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Value *ValOp = nullptr;
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if (isa<ConstantInt>(Val)) {
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ValOp = Val;
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} else if (ConstantFP *CFP = dyn_cast<ConstantFP>(Val)) {
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Ops.push_back(MachineOperand::CreateFPImm(CFP));
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return true;
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} else if (auto *II = dyn_cast<IntrinsicInst>(Val)) {
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if (II->getIntrinsicID() == Intrinsic::spv_track_constant) {
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if (isa<ConstantInt>(II->getOperand(0))) {
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ValOp = II->getOperand(0);
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} else if (ConstantFP *CFP = dyn_cast<ConstantFP>(II->getOperand(0))) {
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Ops.push_back(MachineOperand::CreateFPImm(CFP));
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return true;
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}
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}
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}
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return ValOp ? InlineAsmLowering::lowerAsmOperandForConstraint(
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ValOp, Constraint, Ops, MIRBuilder)
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: false;
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}
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