3cf24dbbdd
This is a complete fix for CompleteLoadGroups introduced in D154309. We need to check for dependency between A and every member of the load Group of B. This patch also fixes another miscompile seen when we incorrectly sink stores below a depending load (see testcase in interleaved-accesses-sink-store-across-load.ll). This is fixed by releasing store groups correctly. This change was previously reverted (e85fd3cbdd68) due to Asan failure with use-after-free error. A testcase is added and the bug is fixed in this version of the patch. Differential Revision: https://reviews.llvm.org/D155520
29 lines
1.0 KiB
LLVM
29 lines
1.0 KiB
LLVM
; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -enable-interleaved-mem-accesses=true -max-dependences=0 -S %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
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; None of these stores have dependences between them, so we can successfully
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; interleave them even though the max-dependences threshold is 0.
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define void @three_interleaved_stores(ptr %arr) {
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; CHECK-LABEL: define void @three_interleaved_stores
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; CHECK: store <12 x i8>
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entry:
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br label %loop
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loop:
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%i = phi i64 [ 0, %entry ], [ %i.next, %loop ]
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%i.plus.1 = add nuw nsw i64 %i, 1
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%i.plus.2 = add nuw nsw i64 %i, 2
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%gep.i.plus.0 = getelementptr inbounds i8, ptr %arr, i64 %i
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%gep.i.plus.1 = getelementptr inbounds i8, ptr %arr, i64 %i.plus.1
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%gep.i.plus.2 = getelementptr inbounds i8, ptr %arr, i64 %i.plus.2
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store i8 1, ptr %gep.i.plus.0
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store i8 1, ptr %gep.i.plus.1
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store i8 1, ptr %gep.i.plus.2
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%i.next = add nuw nsw i64 %i, 3
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%icmp = icmp ugt i64 %i, 1032
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br i1 %icmp, label %exit, label %loop
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exit:
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ret void
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}
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