llvm-project/llvm/test/CodeGen/PowerPC/future-check-features.ll
Baptiste Saleil 7aaa85627b [PowerPC] Add options to control paired vector memops support
Adds frontend and backend options to enable and disable the
PowerPC paired vector memory operations added in ISA 3.1.
Instructions using these options will be added in subsequent patches.

Differential Revision: https://reviews.llvm.org/D83722
2020-07-29 14:00:53 -05:00

20 lines
681 B
LLVM

; RUN: llc -mattr=pcrelative-memops,prefix-instrs,paired-vector-memops \
; RUN: -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
; RUN: -ppc-asm-full-reg-names %s -o - 2>&1 | FileCheck %s
; RUN: llc -mattr=pcrelative-memops,prefix-instrs,paired-vector-memops \
; RUN: -verify-machineinstrs -mtriple=powerpc64-unknown-unknown \
; RUN: -ppc-asm-full-reg-names %s -o - 2>&1 | FileCheck %s
define dso_local signext i32 @f() {
entry:
ret i32 0
}
; Make sure that all of the features listed are recognized.
; CHECK-NOT: is not a recognized feature for this target
; Make sure that the test was actually compiled.
; CHECK: li r3, 0
; CHECK-NEXT: blr