49a7772be5
This removes the tracking of the MinCSFrameIndex, and MaxCSFrameIndex markers, simplifying the target API. This brings the tracking for callee save spill slots in line with how we handle other properties of stack locations. A couple notes: 1) This requires doing scans of the entire object range, but we have other such instances in the code already, so I doubt this will matter in practice. 2) This removes the requirement that callee saved spill slots be contiguous in the frame index identified space. I marked this as NFCI because if prior code violated the contiguous range assumption - I can't find a case where we did - then this change might adjust frame layout in some edge cases. The motivation for this is mostly code readability, but I might use this as a primitive for something in an upcoming patch series around shrink wrapping. Haven't decided yet.
113 lines
4.8 KiB
C++
113 lines
4.8 KiB
C++
//===--------------------- SIFrameLowering.h --------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
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#define LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
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#include "AMDGPUFrameLowering.h"
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#include "SIRegisterInfo.h"
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namespace llvm {
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class SIFrameLowering final : public AMDGPUFrameLowering {
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public:
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SIFrameLowering(StackDirection D, Align StackAl, int LAO,
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Align TransAl = Align(1))
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: AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
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~SIFrameLowering() override = default;
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void emitEntryFunctionPrologue(MachineFunction &MF,
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MachineBasicBlock &MBB) const;
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void emitPrologue(MachineFunction &MF,
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MachineBasicBlock &MBB) const override;
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void emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const override;
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StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
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Register &FrameReg) const override;
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void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
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RegScavenger *RS = nullptr) const override;
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void determineCalleeSavesSGPR(MachineFunction &MF, BitVector &SavedRegs,
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RegScavenger *RS = nullptr) const;
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void determinePrologEpilogSGPRSaves(MachineFunction &MF, BitVector &SavedRegs,
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bool NeedExecCopyReservedReg) const;
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void emitCSRSpillStores(MachineFunction &MF, MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI, DebugLoc &DL,
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LiveRegUnits &LiveUnits, Register FrameReg,
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Register FramePtrRegScratchCopy) const;
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void emitCSRSpillRestores(MachineFunction &MF, MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI, DebugLoc &DL,
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LiveRegUnits &LiveUnits, Register FrameReg,
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Register FramePtrRegScratchCopy) const;
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bool
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assignCalleeSavedSpillSlots(MachineFunction &MF,
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const TargetRegisterInfo *TRI,
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std::vector<CalleeSavedInfo> &CSI) const override;
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bool assignCalleeSavedSpillSlotsImpl(MachineFunction &MF,
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const TargetRegisterInfo *TRI,
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std::vector<CalleeSavedInfo> &CSI) const;
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bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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ArrayRef<CalleeSavedInfo> CSI,
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const TargetRegisterInfo *TRI) const override;
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bool
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restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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MutableArrayRef<CalleeSavedInfo> CSI,
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const TargetRegisterInfo *TRI) const override;
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bool allocateScavengingFrameIndexesNearIncomingSP(
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const MachineFunction &MF) const override;
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bool isSupportedStackID(TargetStackID::Value ID) const override;
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void processFunctionBeforeFrameFinalized(
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MachineFunction &MF,
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RegScavenger *RS = nullptr) const override;
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void processFunctionBeforeFrameIndicesReplaced(
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MachineFunction &MF, RegScavenger *RS = nullptr) const override;
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MachineBasicBlock::iterator
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eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI) const override;
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protected:
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bool hasFPImpl(const MachineFunction &MF) const override;
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private:
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void emitEntryFunctionFlatScratchInit(MachineFunction &MF,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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const DebugLoc &DL,
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Register ScratchWaveOffsetReg) const;
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Register getEntryFunctionReservedScratchRsrcReg(MachineFunction &MF) const;
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void emitEntryFunctionScratchRsrcRegSetup(
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MachineFunction &MF, MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I, const DebugLoc &DL,
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Register PreloadedPrivateBufferReg, Register ScratchRsrcReg,
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Register ScratchWaveOffsetReg) const;
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public:
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bool requiresStackPointerReference(const MachineFunction &MF) const;
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// Returns true if the function may need to reserve space on the stack for the
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// CWSR trap handler.
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bool mayReserveScratchForCWSR(const MachineFunction &MF) const;
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
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