a083e19efe
Currently when considering register pressure is enabled, we reject any VF that has higher pressure than the number of registers. However this can result in failing to vectorize in cases where it's beneficial, as the cost of the extra spills is less than the benefit we get from vectorizing. Deal with this by instead calculating the cost of spills and adding that to the rest of the cost, so we can detect this kind of situation and still vectorize while avoiding vectorizing in cases where the extra cost makes it not with it.
105 lines
3.9 KiB
C++
105 lines
3.9 KiB
C++
//===- VPlanAnalysis.h - Various Analyses working on VPlan ------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TRANSFORMS_VECTORIZE_VPLANANALYSIS_H
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#define LLVM_TRANSFORMS_VECTORIZE_VPLANANALYSIS_H
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/DenseSet.h"
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#include "llvm/ADT/MapVector.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/Type.h"
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namespace llvm {
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class LLVMContext;
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class VPValue;
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class VPBlendRecipe;
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class VPInstruction;
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class VPWidenRecipe;
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class VPWidenCallRecipe;
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class VPWidenIntOrFpInductionRecipe;
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class VPWidenMemoryRecipe;
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class VPReplicateRecipe;
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class VPRecipeBase;
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class VPlan;
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class Value;
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class TargetTransformInfo;
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class Type;
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class InstructionCost;
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struct VPCostContext;
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/// An analysis for type-inference for VPValues.
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/// It infers the scalar type for a given VPValue by bottom-up traversing
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/// through defining recipes until root nodes with known types are reached (e.g.
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/// live-ins or load recipes). The types are then propagated top down through
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/// operations.
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/// Note that the analysis caches the inferred types. A new analysis object must
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/// be constructed once a VPlan has been modified in a way that invalidates any
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/// of the previously inferred types.
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class VPTypeAnalysis {
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DenseMap<const VPValue *, Type *> CachedTypes;
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/// Type of the canonical induction variable. Used for all VPValues without
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/// any underlying IR value (like the vector trip count or the backedge-taken
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/// count).
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Type *CanonicalIVTy;
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LLVMContext &Ctx;
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const DataLayout &DL;
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Type *inferScalarTypeForRecipe(const VPBlendRecipe *R);
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Type *inferScalarTypeForRecipe(const VPInstruction *R);
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Type *inferScalarTypeForRecipe(const VPWidenCallRecipe *R);
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Type *inferScalarTypeForRecipe(const VPWidenRecipe *R);
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Type *inferScalarTypeForRecipe(const VPWidenIntOrFpInductionRecipe *R);
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Type *inferScalarTypeForRecipe(const VPWidenMemoryRecipe *R);
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Type *inferScalarTypeForRecipe(const VPReplicateRecipe *R);
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public:
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VPTypeAnalysis(const VPlan &Plan);
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/// Infer the type of \p V. Returns the scalar type of \p V.
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Type *inferScalarType(const VPValue *V);
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/// Return the LLVMContext used by the analysis.
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LLVMContext &getContext() { return Ctx; }
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};
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// Collect a VPlan's ephemeral recipes (those used only by an assume).
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void collectEphemeralRecipesForVPlan(VPlan &Plan,
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DenseSet<VPRecipeBase *> &EphRecipes);
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/// A struct that represents some properties of the register usage
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/// of a loop.
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struct VPRegisterUsage {
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/// Holds the number of loop invariant values that are used in the loop.
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/// The key is ClassID of target-provided register class.
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SmallMapVector<unsigned, unsigned, 4> LoopInvariantRegs;
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/// Holds the maximum number of concurrent live intervals in the loop.
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/// The key is ClassID of target-provided register class.
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SmallMapVector<unsigned, unsigned, 4> MaxLocalUsers;
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/// Calculate the estimated cost of any spills due to using more registers
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/// than the number available for the target. If non-zero, OverrideMaxNumRegs
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/// is used in place of the target's number of registers.
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InstructionCost spillCost(VPCostContext &Ctx,
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unsigned OverrideMaxNumRegs = 0) const;
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};
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/// Estimate the register usage for \p Plan and vectorization factors in \p VFs
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/// by calculating the highest number of values that are live at a single
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/// location as a rough estimate. Returns the register usage for each VF in \p
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/// VFs.
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SmallVector<VPRegisterUsage, 8> calculateRegisterUsageForPlan(
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VPlan &Plan, ArrayRef<ElementCount> VFs, const TargetTransformInfo &TTI,
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const SmallPtrSetImpl<const Value *> &ValuesToIgnore);
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} // end namespace llvm
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#endif // LLVM_TRANSFORMS_VECTORIZE_VPLANANALYSIS_H
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