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llvm-project/llvm/test/Analysis/CostModel/AMDGPU/fdiv.ll
Matt Arsenault 2502e3b7ba
IR: Promote "denormal-fp-math" to a first class attribute (#174293) 
Convert "denormal-fp-math" and "denormal-fp-math-f32" into a first
class denormal_fpenv attribute. Previously the query for the effective
denormal mode involved two string attribute queries with parsing. I'm
introducing more uses of this, so it makes sense to convert this
to a more efficient encoding. The old representation was also awkward
since it was split across two separate attributes. The new encoding
just stores the default and float modes as bitfields, largely avoiding
the need to consider if the other mode is set.

The syntax in the common cases looks like this:
  `denormal_fpenv(preservesign,preservesign)`
  `denormal_fpenv(float: preservesign,preservesign)`
  `denormal_fpenv(dynamic,dynamic float: preservesign,preservesign)`

I wasn't sure about reusing the float type name instead of adding a
new keyword. It's parsed as a type but only accepts float. I'm also
debating switching the name to subnormal to match the current
preferred IEEE terminology (also used by nofpclass and other
contexts).

This has a behavior change when using the command flag debug
options to set the denormal mode. The behavior of the flag
ignored functions with an explicit attribute set, per
the default and f32 version. Now that these are one attribute,
the flag logic can't distinguish which of the two components
were explicitly set on the function. Only one test appeared to
rely on this behavior, so I just avoided using the flags in it.

This also does not perform all the code cleanups this enables.
In particular the attributor handling could be cleaned up.

I also guessed at how to support this in MLIR. I followed
MemoryEffects as a reference; it appears bitfields are expanded
into arguments to attributes, so the representation there is
a bit uglier with the 2 2-element fields flattened into 4 arguments.
2026-02-05 13:31:26 +00:00

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; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=hawaii < %s | FileCheck -check-prefixes=ALL,NOFP16,CIFASTF64 %s
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri < %s | FileCheck -check-prefixes=ALL,NOFP16,CISLOWF64 %s
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti < %s | FileCheck -check-prefixes=ALL,NOFP16,SIFASTF64 %s
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=amdgcn-mesa-mesa3d -mcpu=verde < %s | FileCheck -check-prefixes=ALL,NOFP16,SISLOWF64 %s
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=ALL,FP16 %s
; RUN: opt -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=hawaii < %s | FileCheck -check-prefixes=ALL-SIZE,NOFP16-SIZE,CI-SIZE %s
; RUN: opt -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri < %s | FileCheck -check-prefixes=ALL-SIZE,NOFP16-SIZE,CI-SIZE %s
; RUN: opt -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti < %s | FileCheck -check-prefixes=ALL-SIZE,NOFP16-SIZE,SI-SIZE %s
; RUN: opt -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-mesa-mesa3d -mcpu=verde < %s | FileCheck -check-prefixes=ALL-SIZE,NOFP16-SIZE,SI-SIZE %s
; RUN: opt -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=ALL-SIZE,FP16-SIZE %s
; END.
define amdgpu_kernel void @fdiv_f32_ieee() #0 {
; ALL-LABEL: 'fdiv_f32_ieee'
; ALL-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %f32 = fdiv float undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %v2f32 = fdiv <2 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 42 for instruction: %v3f32 = fdiv <3 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %v4f32 = fdiv <4 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 70 for instruction: %v5f32 = fdiv <5 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %v8f32 = fdiv <8 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 378 for instruction: %v9f32 = fdiv <9 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; ALL-SIZE-LABEL: 'fdiv_f32_ieee'
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %f32 = fdiv float undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %v2f32 = fdiv <2 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %v3f32 = fdiv <3 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v4f32 = fdiv <4 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 60 for instruction: %v5f32 = fdiv <5 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %v8f32 = fdiv <8 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 324 for instruction: %v9f32 = fdiv <9 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
;
%f32 = fdiv float undef, undef
%v2f32 = fdiv <2 x float> undef, undef
%v3f32 = fdiv <3 x float> undef, undef
%v4f32 = fdiv <4 x float> undef, undef
%v5f32 = fdiv <5 x float> undef, undef
%v8f32 = fdiv <8 x float> undef, undef
%v9f32 = fdiv <9 x float> undef, undef
ret void
}
define amdgpu_kernel void @fdiv_f32_afn_ieee() #0 {
; ALL-LABEL: 'fdiv_f32_afn_ieee'
; ALL-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %f32 = fdiv afn float undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v2f32 = fdiv afn <2 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v3f32 = fdiv afn <3 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %v4f32 = fdiv afn <4 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v5f32 = fdiv afn <5 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %v8f32 = fdiv afn <8 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %v9f32 = fdiv afn <9 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; ALL-SIZE-LABEL: 'fdiv_f32_afn_ieee'
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %f32 = fdiv afn float undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v2f32 = fdiv afn <2 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v3f32 = fdiv afn <3 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v4f32 = fdiv afn <4 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v5f32 = fdiv afn <5 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %v8f32 = fdiv afn <8 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 81 for instruction: %v9f32 = fdiv afn <9 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
;
%f32 = fdiv afn float undef, undef
%v2f32 = fdiv afn <2 x float> undef, undef
%v3f32 = fdiv afn <3 x float> undef, undef
%v4f32 = fdiv afn <4 x float> undef, undef
%v5f32 = fdiv afn <5 x float> undef, undef
%v8f32 = fdiv afn <8 x float> undef, undef
%v9f32 = fdiv afn <9 x float> undef, undef
ret void
}
define amdgpu_kernel void @fdiv_f32_ftzdaz() #1 {
; ALL-LABEL: 'fdiv_f32_ftzdaz'
; ALL-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %f32 = fdiv float undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v2f32 = fdiv <2 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v3f32 = fdiv <3 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %v4f32 = fdiv <4 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %v5f32 = fdiv <5 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %v8f32 = fdiv <8 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 432 for instruction: %v9f32 = fdiv <9 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; ALL-SIZE-LABEL: 'fdiv_f32_ftzdaz'
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %f32 = fdiv float undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %v2f32 = fdiv <2 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 42 for instruction: %v3f32 = fdiv <3 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %v4f32 = fdiv <4 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 70 for instruction: %v5f32 = fdiv <5 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %v8f32 = fdiv <8 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 378 for instruction: %v9f32 = fdiv <9 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
;
%f32 = fdiv float undef, undef
%v2f32 = fdiv <2 x float> undef, undef
%v3f32 = fdiv <3 x float> undef, undef
%v4f32 = fdiv <4 x float> undef, undef
%v5f32 = fdiv <5 x float> undef, undef
%v8f32 = fdiv <8 x float> undef, undef
%v9f32 = fdiv <9 x float> undef, undef
ret void
}
define amdgpu_kernel void @fdiv_f32_afn_ftzdaz() #1 {
; ALL-LABEL: 'fdiv_f32_afn_ftzdaz'
; ALL-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %f32 = fdiv afn float undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v2f32 = fdiv afn <2 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v3f32 = fdiv afn <3 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %v4f32 = fdiv afn <4 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v5f32 = fdiv afn <5 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %v8f32 = fdiv afn <8 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %v9f32 = fdiv afn <9 x float> undef, undef
; ALL-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; ALL-SIZE-LABEL: 'fdiv_f32_afn_ftzdaz'
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %f32 = fdiv afn float undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v2f32 = fdiv afn <2 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v3f32 = fdiv afn <3 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v4f32 = fdiv afn <4 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v5f32 = fdiv afn <5 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %v8f32 = fdiv afn <8 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 81 for instruction: %v9f32 = fdiv afn <9 x float> undef, undef
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
;
%f32 = fdiv afn float undef, undef
%v2f32 = fdiv afn <2 x float> undef, undef
%v3f32 = fdiv afn <3 x float> undef, undef
%v4f32 = fdiv afn <4 x float> undef, undef
%v5f32 = fdiv afn <5 x float> undef, undef
%v8f32 = fdiv afn <8 x float> undef, undef
%v9f32 = fdiv afn <9 x float> undef, undef
ret void
}
define amdgpu_kernel void @fdiv_f64() #0 {
; CIFASTF64-LABEL: 'fdiv_f64'
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %f64 = fdiv double undef, undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v2f64 = fdiv <2 x double> undef, undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 72 for instruction: %v3f64 = fdiv <3 x double> undef, undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %v4f64 = fdiv <4 x double> undef, undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 576 for instruction: %v5f64 = fdiv <5 x double> undef, undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; CISLOWF64-LABEL: 'fdiv_f64'
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 38 for instruction: %f64 = fdiv double undef, undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 76 for instruction: %v2f64 = fdiv <2 x double> undef, undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 114 for instruction: %v3f64 = fdiv <3 x double> undef, undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 152 for instruction: %v4f64 = fdiv <4 x double> undef, undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 912 for instruction: %v5f64 = fdiv <5 x double> undef, undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; SIFASTF64-LABEL: 'fdiv_f64'
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %f64 = fdiv double undef, undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %v2f64 = fdiv <2 x double> undef, undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 81 for instruction: %v3f64 = fdiv <3 x double> undef, undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 108 for instruction: %v4f64 = fdiv <4 x double> undef, undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 648 for instruction: %v5f64 = fdiv <5 x double> undef, undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; SISLOWF64-LABEL: 'fdiv_f64'
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %f64 = fdiv double undef, undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 82 for instruction: %v2f64 = fdiv <2 x double> undef, undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 123 for instruction: %v3f64 = fdiv <3 x double> undef, undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 164 for instruction: %v4f64 = fdiv <4 x double> undef, undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 984 for instruction: %v5f64 = fdiv <5 x double> undef, undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; FP16-LABEL: 'fdiv_f64'
; FP16-NEXT: Cost Model: Found an estimated cost of 38 for instruction: %f64 = fdiv double undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 76 for instruction: %v2f64 = fdiv <2 x double> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 114 for instruction: %v3f64 = fdiv <3 x double> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 152 for instruction: %v4f64 = fdiv <4 x double> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 912 for instruction: %v5f64 = fdiv <5 x double> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; CI-SIZE-LABEL: 'fdiv_f64'
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %f64 = fdiv double undef, undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 44 for instruction: %v2f64 = fdiv <2 x double> undef, undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 66 for instruction: %v3f64 = fdiv <3 x double> undef, undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 88 for instruction: %v4f64 = fdiv <4 x double> undef, undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 528 for instruction: %v5f64 = fdiv <5 x double> undef, undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
;
; SI-SIZE-LABEL: 'fdiv_f64'
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %f64 = fdiv double undef, undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 50 for instruction: %v2f64 = fdiv <2 x double> undef, undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 75 for instruction: %v3f64 = fdiv <3 x double> undef, undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 100 for instruction: %v4f64 = fdiv <4 x double> undef, undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 600 for instruction: %v5f64 = fdiv <5 x double> undef, undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
;
; FP16-SIZE-LABEL: 'fdiv_f64'
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %f64 = fdiv double undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 44 for instruction: %v2f64 = fdiv <2 x double> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 66 for instruction: %v3f64 = fdiv <3 x double> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 88 for instruction: %v4f64 = fdiv <4 x double> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 528 for instruction: %v5f64 = fdiv <5 x double> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
;
%f64 = fdiv double undef, undef
%v2f64 = fdiv <2 x double> undef, undef
%v3f64 = fdiv <3 x double> undef, undef
%v4f64 = fdiv <4 x double> undef, undef
%v5f64 = fdiv <5 x double> undef, undef
ret void
}
define amdgpu_kernel void @fdiv_f16_f32ieee() #0 {
; NOFP16-LABEL: 'fdiv_f16_f32ieee'
; NOFP16-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %f16 = fdiv half undef, undef
; NOFP16-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %v2f16 = fdiv <2 x half> undef, undef
; NOFP16-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %v3f16 = fdiv <3 x half> undef, undef
; NOFP16-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %v4f16 = fdiv <4 x half> undef, undef
; NOFP16-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %v5f16 = fdiv <5 x half> undef, undef
; NOFP16-NEXT: Cost Model: Found an estimated cost of 224 for instruction: %v16f16 = fdiv <16 x half> undef, undef
; NOFP16-NEXT: Cost Model: Found an estimated cost of 476 for instruction: %v17f16 = fdiv <17 x half> undef, undef
; NOFP16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; FP16-LABEL: 'fdiv_f16_f32ieee'
; FP16-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %f16 = fdiv half undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %v2f16 = fdiv <2 x half> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v3f16 = fdiv <3 x half> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v4f16 = fdiv <4 x half> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %v5f16 = fdiv <5 x half> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 192 for instruction: %v16f16 = fdiv <16 x half> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 1152 for instruction: %v17f16 = fdiv <17 x half> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; NOFP16-SIZE-LABEL: 'fdiv_f16_f32ieee'
; NOFP16-SIZE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %f16 = fdiv half undef, undef
; NOFP16-SIZE-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %v2f16 = fdiv <2 x half> undef, undef
; NOFP16-SIZE-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v3f16 = fdiv <3 x half> undef, undef
; NOFP16-SIZE-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v4f16 = fdiv <4 x half> undef, undef
; NOFP16-SIZE-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %v5f16 = fdiv <5 x half> undef, undef
; NOFP16-SIZE-NEXT: Cost Model: Found an estimated cost of 192 for instruction: %v16f16 = fdiv <16 x half> undef, undef
; NOFP16-SIZE-NEXT: Cost Model: Found an estimated cost of 408 for instruction: %v17f16 = fdiv <17 x half> undef, undef
; NOFP16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
;
; FP16-SIZE-LABEL: 'fdiv_f16_f32ieee'
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %f16 = fdiv half undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v2f16 = fdiv <2 x half> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v3f16 = fdiv <3 x half> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v4f16 = fdiv <4 x half> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %v5f16 = fdiv <5 x half> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %v16f16 = fdiv <16 x half> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 768 for instruction: %v17f16 = fdiv <17 x half> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
;
%f16 = fdiv half undef, undef
%v2f16 = fdiv <2 x half> undef, undef
%v3f16 = fdiv <3 x half> undef, undef
%v4f16 = fdiv <4 x half> undef, undef
%v5f16 = fdiv <5 x half> undef, undef
%v16f16 = fdiv <16 x half> undef, undef
%v17f16 = fdiv <17 x half> undef, undef
ret void
}
define amdgpu_kernel void @fdiv_f16_f32ftzdaz() #1 {
; NOFP16-LABEL: 'fdiv_f16_f32ftzdaz'
; NOFP16-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %f16 = fdiv half undef, undef
; NOFP16-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v2f16 = fdiv <2 x half> undef, undef
; NOFP16-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %v3f16 = fdiv <3 x half> undef, undef
; NOFP16-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %v4f16 = fdiv <4 x half> undef, undef
; NOFP16-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %v5f16 = fdiv <5 x half> undef, undef
; NOFP16-NEXT: Cost Model: Found an estimated cost of 256 for instruction: %v16f16 = fdiv <16 x half> undef, undef
; NOFP16-NEXT: Cost Model: Found an estimated cost of 544 for instruction: %v17f16 = fdiv <17 x half> undef, undef
; NOFP16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; FP16-LABEL: 'fdiv_f16_f32ftzdaz'
; FP16-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %f16 = fdiv half undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %v2f16 = fdiv <2 x half> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v3f16 = fdiv <3 x half> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v4f16 = fdiv <4 x half> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %v5f16 = fdiv <5 x half> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 192 for instruction: %v16f16 = fdiv <16 x half> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 1152 for instruction: %v17f16 = fdiv <17 x half> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; NOFP16-SIZE-LABEL: 'fdiv_f16_f32ftzdaz'
; NOFP16-SIZE-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %f16 = fdiv half undef, undef
; NOFP16-SIZE-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %v2f16 = fdiv <2 x half> undef, undef
; NOFP16-SIZE-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %v3f16 = fdiv <3 x half> undef, undef
; NOFP16-SIZE-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %v4f16 = fdiv <4 x half> undef, undef
; NOFP16-SIZE-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %v5f16 = fdiv <5 x half> undef, undef
; NOFP16-SIZE-NEXT: Cost Model: Found an estimated cost of 224 for instruction: %v16f16 = fdiv <16 x half> undef, undef
; NOFP16-SIZE-NEXT: Cost Model: Found an estimated cost of 476 for instruction: %v17f16 = fdiv <17 x half> undef, undef
; NOFP16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
;
; FP16-SIZE-LABEL: 'fdiv_f16_f32ftzdaz'
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %f16 = fdiv half undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v2f16 = fdiv <2 x half> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v3f16 = fdiv <3 x half> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v4f16 = fdiv <4 x half> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %v5f16 = fdiv <5 x half> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %v16f16 = fdiv <16 x half> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 768 for instruction: %v17f16 = fdiv <17 x half> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
;
%f16 = fdiv half undef, undef
%v2f16 = fdiv <2 x half> undef, undef
%v3f16 = fdiv <3 x half> undef, undef
%v4f16 = fdiv <4 x half> undef, undef
%v5f16 = fdiv <5 x half> undef, undef
%v16f16 = fdiv <16 x half> undef, undef
%v17f16 = fdiv <17 x half> undef, undef
ret void
}
define amdgpu_kernel void @rcp_ieee() #0 {
; CIFASTF64-LABEL: 'rcp_ieee'
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %f16 = fdiv half 0xH3C00, undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %f32 = fdiv float 1.000000e+00, undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 42 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 70 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %f64 = fdiv double 1.000000e+00, undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 72 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 576 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; CISLOWF64-LABEL: 'rcp_ieee'
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %f16 = fdiv half 0xH3C00, undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %f32 = fdiv float 1.000000e+00, undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 42 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 70 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 38 for instruction: %f64 = fdiv double 1.000000e+00, undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 76 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 114 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 152 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 912 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; SIFASTF64-LABEL: 'rcp_ieee'
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %f16 = fdiv half 0xH3C00, undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %f32 = fdiv float 1.000000e+00, undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 42 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 70 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %f64 = fdiv double 1.000000e+00, undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 81 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 108 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 648 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; SISLOWF64-LABEL: 'rcp_ieee'
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %f16 = fdiv half 0xH3C00, undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %f32 = fdiv float 1.000000e+00, undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 42 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 70 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %f64 = fdiv double 1.000000e+00, undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 82 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 123 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 164 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 984 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; FP16-LABEL: 'rcp_ieee'
; FP16-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %f16 = fdiv half 0xH3C00, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %f32 = fdiv float 1.000000e+00, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 42 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 70 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 38 for instruction: %f64 = fdiv double 1.000000e+00, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 76 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 114 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 152 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 912 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; CI-SIZE-LABEL: 'rcp_ieee'
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %f16 = fdiv half 0xH3C00, undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %f32 = fdiv float 1.000000e+00, undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 60 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %f64 = fdiv double 1.000000e+00, undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 44 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 66 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 88 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 528 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
;
; SI-SIZE-LABEL: 'rcp_ieee'
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %f16 = fdiv half 0xH3C00, undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %f32 = fdiv float 1.000000e+00, undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 60 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %f64 = fdiv double 1.000000e+00, undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 50 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 75 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 100 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 600 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
;
; FP16-SIZE-LABEL: 'rcp_ieee'
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f16 = fdiv half 0xH3C00, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %f32 = fdiv float 1.000000e+00, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 60 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %f64 = fdiv double 1.000000e+00, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 44 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 66 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 88 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 528 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
;
%f16 = fdiv half 1.0, undef
%v2f16 = fdiv <2 x half> <half 1.0, half 1.0>, undef
%v3f16 = fdiv <3 x half> <half 1.0, half 1.0, half 1.0>, undef
%v4f16 = fdiv <4 x half> <half 1.0, half 1.0, half 1.0, half 1.0>, undef
%v5f16 = fdiv <5 x half> <half 1.0, half 1.0, half 1.0, half 1.0, half 1.0>, undef
%f32 = fdiv float 1.0, undef
%v2f32 = fdiv <2 x float> <float 1.0, float 1.0>, undef
%v3f32 = fdiv <3 x float> <float 1.0, float 1.0, float 1.0>, undef
%v4f32 = fdiv <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, undef
%v5f32 = fdiv <5 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, undef
%f64 = fdiv double 1.0, undef
%v2f64 = fdiv <2 x double> <double 1.0, double 1.0>, undef
%v3f64 = fdiv <3 x double> <double 1.0, double 1.0, double 1.0>, undef
%v4f64 = fdiv <4 x double> <double 1.0, double 1.0, double 1.0, double 1.0>, undef
%v5f64 = fdiv <5 x double> <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0>, undef
ret void
}
define amdgpu_kernel void @rcp_ftzdaz() #1 {
; CIFASTF64-LABEL: 'rcp_ftzdaz'
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %f16 = fdiv half 0xH3C00, undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %f32 = fdiv float 1.000000e+00, undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %f64 = fdiv double 1.000000e+00, undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 72 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 576 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; CISLOWF64-LABEL: 'rcp_ftzdaz'
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %f16 = fdiv half 0xH3C00, undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %f32 = fdiv float 1.000000e+00, undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 38 for instruction: %f64 = fdiv double 1.000000e+00, undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 76 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 114 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 152 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 912 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; SIFASTF64-LABEL: 'rcp_ftzdaz'
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %f16 = fdiv half 0xH3C00, undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %f32 = fdiv float 1.000000e+00, undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %f64 = fdiv double 1.000000e+00, undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 81 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 108 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 648 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; SISLOWF64-LABEL: 'rcp_ftzdaz'
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %f16 = fdiv half 0xH3C00, undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %f32 = fdiv float 1.000000e+00, undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %f64 = fdiv double 1.000000e+00, undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 82 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 123 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 164 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 984 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; FP16-LABEL: 'rcp_ftzdaz'
; FP16-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %f16 = fdiv half 0xH3C00, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %f32 = fdiv float 1.000000e+00, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 38 for instruction: %f64 = fdiv double 1.000000e+00, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 76 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 114 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 152 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 912 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
; FP16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
;
; CI-SIZE-LABEL: 'rcp_ftzdaz'
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f16 = fdiv half 0xH3C00, undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f32 = fdiv float 1.000000e+00, undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %f64 = fdiv double 1.000000e+00, undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 44 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 66 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 88 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 528 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
;
; SI-SIZE-LABEL: 'rcp_ftzdaz'
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f16 = fdiv half 0xH3C00, undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f32 = fdiv float 1.000000e+00, undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %f64 = fdiv double 1.000000e+00, undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 50 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 75 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 100 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 600 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
;
; FP16-SIZE-LABEL: 'rcp_ftzdaz'
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f16 = fdiv half 0xH3C00, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f32 = fdiv float 1.000000e+00, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %f64 = fdiv double 1.000000e+00, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 44 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 66 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 88 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 528 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
;
%f16 = fdiv half 1.0, undef
%v2f16 = fdiv <2 x half> <half 1.0, half 1.0>, undef
%v3f16 = fdiv <3 x half> <half 1.0, half 1.0, half 1.0>, undef
%v4f16 = fdiv <4 x half> <half 1.0, half 1.0, half 1.0, half 1.0>, undef
%v5f16 = fdiv <5 x half> <half 1.0, half 1.0, half 1.0, half 1.0, half 1.0>, undef
%f32 = fdiv float 1.0, undef
%v2f32 = fdiv <2 x float> <float 1.0, float 1.0>, undef
%v3f32 = fdiv <3 x float> <float 1.0, float 1.0, float 1.0>, undef
%v4f32 = fdiv <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, undef
%v5f32 = fdiv <5 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, undef
%f64 = fdiv double 1.0, undef
%v2f64 = fdiv <2 x double> <double 1.0, double 1.0>, undef
%v3f64 = fdiv <3 x double> <double 1.0, double 1.0, double 1.0>, undef
%v4f64 = fdiv <4 x double> <double 1.0, double 1.0, double 1.0, double 1.0>, undef
%v5f64 = fdiv <5 x double> <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0>, undef
ret void
}
define i32 @frem(i32 %arg) {
; CIFASTF64-LABEL: 'frem'
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %F32 = frem float undef, undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %V4F32 = frem <4 x float> undef, undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %V8F32 = frem <8 x float> undef, undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 672 for instruction: %V16F32 = frem <16 x float> undef, undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %F64 = frem double undef, undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V2F64 = frem <2 x double> undef, undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V4F64 = frem <4 x double> undef, undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 576 for instruction: %V8F64 = frem <8 x double> undef, undef
; CIFASTF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret i32 undef
;
; CISLOWF64-LABEL: 'frem'
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %F32 = frem float undef, undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %V4F32 = frem <4 x float> undef, undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %V8F32 = frem <8 x float> undef, undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 672 for instruction: %V16F32 = frem <16 x float> undef, undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 38 for instruction: %F64 = frem double undef, undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 76 for instruction: %V2F64 = frem <2 x double> undef, undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 152 for instruction: %V4F64 = frem <4 x double> undef, undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 912 for instruction: %V8F64 = frem <8 x double> undef, undef
; CISLOWF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret i32 undef
;
; SIFASTF64-LABEL: 'frem'
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %F32 = frem float undef, undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %V4F32 = frem <4 x float> undef, undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %V8F32 = frem <8 x float> undef, undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 672 for instruction: %V16F32 = frem <16 x float> undef, undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %F64 = frem double undef, undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %V2F64 = frem <2 x double> undef, undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 108 for instruction: %V4F64 = frem <4 x double> undef, undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 648 for instruction: %V8F64 = frem <8 x double> undef, undef
; SIFASTF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret i32 undef
;
; SISLOWF64-LABEL: 'frem'
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %F32 = frem float undef, undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %V4F32 = frem <4 x float> undef, undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %V8F32 = frem <8 x float> undef, undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 672 for instruction: %V16F32 = frem <16 x float> undef, undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %F64 = frem double undef, undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 82 for instruction: %V2F64 = frem <2 x double> undef, undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 164 for instruction: %V4F64 = frem <4 x double> undef, undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 984 for instruction: %V8F64 = frem <8 x double> undef, undef
; SISLOWF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret i32 undef
;
; FP16-LABEL: 'frem'
; FP16-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %F32 = frem float undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %V4F32 = frem <4 x float> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %V8F32 = frem <8 x float> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 672 for instruction: %V16F32 = frem <16 x float> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 38 for instruction: %F64 = frem double undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 76 for instruction: %V2F64 = frem <2 x double> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 152 for instruction: %V4F64 = frem <4 x double> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 912 for instruction: %V8F64 = frem <8 x double> undef, undef
; FP16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret i32 undef
;
; CI-SIZE-LABEL: 'frem'
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %F32 = frem float undef, undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V4F32 = frem <4 x float> undef, undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V8F32 = frem <8 x float> undef, undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 576 for instruction: %V16F32 = frem <16 x float> undef, undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %F64 = frem double undef, undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 44 for instruction: %V2F64 = frem <2 x double> undef, undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 88 for instruction: %V4F64 = frem <4 x double> undef, undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 528 for instruction: %V8F64 = frem <8 x double> undef, undef
; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
;
; SI-SIZE-LABEL: 'frem'
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %F32 = frem float undef, undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V4F32 = frem <4 x float> undef, undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V8F32 = frem <8 x float> undef, undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 576 for instruction: %V16F32 = frem <16 x float> undef, undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %F64 = frem double undef, undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 50 for instruction: %V2F64 = frem <2 x double> undef, undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 100 for instruction: %V4F64 = frem <4 x double> undef, undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 600 for instruction: %V8F64 = frem <8 x double> undef, undef
; SI-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
;
; FP16-SIZE-LABEL: 'frem'
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %F32 = frem float undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V4F32 = frem <4 x float> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V8F32 = frem <8 x float> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 576 for instruction: %V16F32 = frem <16 x float> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %F64 = frem double undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 44 for instruction: %V2F64 = frem <2 x double> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 88 for instruction: %V4F64 = frem <4 x double> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 528 for instruction: %V8F64 = frem <8 x double> undef, undef
; FP16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
;
%F32 = frem float undef, undef
%V4F32 = frem <4 x float> undef, undef
%V8F32 = frem <8 x float> undef, undef
%V16F32 = frem <16 x float> undef, undef
%F64 = frem double undef, undef
%V2F64 = frem <2 x double> undef, undef
%V4F64 = frem <4 x double> undef, undef
%V8F64 = frem <8 x double> undef, undef
ret i32 undef
}
attributes #0 = { nounwind denormal_fpenv(float: ieee|ieee) }
attributes #1 = { nounwind denormal_fpenv(float: preservesign) }
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