a1e59bdc17
I'm not sure if this is the best way forward or not, but we have a lot of issues with forgetting that shuffle_vectors can be scalar again and again. (There is another example from the recent known-bits code added recently). As a scalar-dst shuffle vector is just an extract, and a scalar-source shuffle vector is just a build vector, this patch makes scalar shuffle vector illegal and adjusts the irbuilder to create the correct node as required. Most targets do this already through lowering or combines. Making scalar shuffles illegal simplifies gisel as a whole, it just requires that transforms that create shuffles of new sizes to account for the scalar shuffle being illegal (mostly IRBuilder and LessElements).
37 lines
1.9 KiB
YAML
37 lines
1.9 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -march=amdgcn -run-pass=legalizer %s -o - | FileCheck %s
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---
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name: test
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: test
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; CHECK: [[C:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
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; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[C]](p0) :: (load (s32), align 16)
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 4
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; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[C1]](p0) :: (load (s32) from unknown-address + 4)
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; CHECK-NEXT: [[C2:%[0-9]+]]:_(p0) = G_CONSTANT i64 8
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; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[C2]](p0) :: (load (s32) from unknown-address + 8, align 8)
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; CHECK-NEXT: [[C3:%[0-9]+]]:_(p0) = G_CONSTANT i64 12
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; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[C3]](p0) :: (load (s32) from unknown-address + 12)
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; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32)
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; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x p0>) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>)
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; CHECK-NEXT: [[UV:%[0-9]+]]:_(p0), [[UV1:%[0-9]+]]:_(p0) = G_UNMERGE_VALUES [[BITCAST]](<2 x p0>)
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY [[UV]](p0)
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; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](p0)
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; CHECK-NEXT: $vgpr0 = COPY [[UV2]](s32)
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; CHECK-NEXT: $vgpr1 = COPY [[UV3]](s32)
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; CHECK-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1
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%0:_(p0) = G_CONSTANT i64 0
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%1:_(<2 x p0>) = G_BUILD_VECTOR %0:_(p0), %0:_(p0)
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%2:_(<2 x p0>) = G_LOAD %0:_(p0) :: (load (<2 x p0>))
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%idx:_(s32) = G_CONSTANT i32 0
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%3:_(p0) = G_EXTRACT_VECTOR_ELT %2:_(<2 x p0>), %idx
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%4:_(s32), %5:_(s32) = G_UNMERGE_VALUES %3:_(p0)
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$vgpr0 = COPY %4:_(s32)
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$vgpr1 = COPY %5:_(s32)
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SI_RETURN implicit $vgpr0, implicit $vgpr1
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...
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