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llvm-project/llvm/test/CodeGen/DirectX/WavePrefixProduct.ll
Kai 6fe2aee9e6
[HLSL][DXIL][SPIRV] WavePrefixProduct intrinsic support (#179423) 
This PR adds WavePrefixProduct intrinsic support in HLSL with codegen
for both DirectX and SPIRV backends. Resolves
https://github.com/llvm/llvm-project/issues/99173.

- [x] Implement `WavePrefixProduct` clang builtin
- [x] Link `WavePrefixProduct` clang builtin with `hlsl_intrinsics.h`
- [x] Add sema checks for `WavePrefixProduct` to
`CheckHLSLBuiltinFunctionCall` in `SemaChecking.cpp`
- [x] Add codegen for `WavePrefixProduct` to `EmitHLSLBuiltinExpr` in
`CGBuiltin.cpp`
- [x] Add codegen tests to
`clang/test/CodeGenHLSL/builtins/WavePrefixProduct.hlsl`
- [x] Add sema tests to
`clang/test/SemaHLSL/BuiltIns/WavePrefixProduct-errors.hlsl`
- [x] Create the `int_dx_WavePrefixProduct` intrinsic in
`IntrinsicsDirectX.td`
- [x] Create the `DXILOpMapping` of `int_dx_WavePrefixProduct` to `121`
in `DXIL.td`
- [x] Create the `WavePrefixProduct.ll` and
`WavePrefixProduct_errors.ll` tests in `llvm/test/CodeGen/DirectX/`
- [x] Create the `int_spv_WavePrefixProduct` intrinsic in
`IntrinsicsSPIRV.td`
- [x] In `SPIRVInstructionSelector.cpp` create the `WavePrefixProduct`
lowering and map it to `int_spv_WavePrefixProduct` in
`SPIRVInstructionSelector::selectIntrinsic`.
- [x] Create SPIR-V backend test case in
`llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WavePrefixProduct.ll`
2026-02-17 17:32:40 -05:00

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; RUN: opt -S -scalarizer -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library < %s | FileCheck %s
; Test that for scalar values, WavePrefixProduct maps down to the DirectX op
define noundef half @wave_prefix_product_half(half noundef %expr) {
entry:
; CHECK: call half @dx.op.wavePrefixOp.f16(i32 121, half %expr, i8 1, i8 0)
%ret = call half @llvm.dx.wave.prefix.product.f16(half %expr)
ret half %ret
}
define noundef float @wave_prefix_product_float(float noundef %expr) {
entry:
; CHECK: call float @dx.op.wavePrefixOp.f32(i32 121, float %expr, i8 1, i8 0)
%ret = call float @llvm.dx.wave.prefix.product.f32(float %expr)
ret float %ret
}
define noundef double @wave_prefix_product_double(double noundef %expr) {
entry:
; CHECK: call double @dx.op.wavePrefixOp.f64(i32 121, double %expr, i8 1, i8 0)
%ret = call double @llvm.dx.wave.prefix.product.f64(double %expr)
ret double %ret
}
define noundef i16 @wave_prefix_product_i16(i16 noundef %expr) {
entry:
; CHECK: call i16 @dx.op.wavePrefixOp.i16(i32 121, i16 %expr, i8 1, i8 0)
%ret = call i16 @llvm.dx.wave.prefix.product.i16(i16 %expr)
ret i16 %ret
}
define noundef i32 @wave_prefix_product_i32(i32 noundef %expr) {
entry:
; CHECK: call i32 @dx.op.wavePrefixOp.i32(i32 121, i32 %expr, i8 1, i8 0)
%ret = call i32 @llvm.dx.wave.prefix.product.i32(i32 %expr)
ret i32 %ret
}
define noundef i64 @wave_prefix_product_i64(i64 noundef %expr) {
entry:
; CHECK: call i64 @dx.op.wavePrefixOp.i64(i32 121, i64 %expr, i8 1, i8 0)
%ret = call i64 @llvm.dx.wave.prefix.product.i64(i64 %expr)
ret i64 %ret
}
define noundef i16 @wave_prefix_uproduct_i16(i16 noundef %expr) {
entry:
; CHECK: call i16 @dx.op.wavePrefixOp.i16(i32 121, i16 %expr, i8 1, i8 1)
%ret = call i16 @llvm.dx.wave.prefix.uproduct.i16(i16 %expr)
ret i16 %ret
}
define noundef i32 @wave_prefix_uproduct_i32(i32 noundef %expr) {
entry:
; CHECK: call i32 @dx.op.wavePrefixOp.i32(i32 121, i32 %expr, i8 1, i8 1)
%ret = call i32 @llvm.dx.wave.prefix.uproduct.i32(i32 %expr)
ret i32 %ret
}
define noundef i64 @wave_prefix_uproduct_i64(i64 noundef %expr) {
entry:
; CHECK: call i64 @dx.op.wavePrefixOp.i64(i32 121, i64 %expr, i8 1, i8 1)
%ret = call i64 @llvm.dx.wave.prefix.uproduct.i64(i64 %expr)
ret i64 %ret
}
declare half @llvm.dx.wave.prefix.product.f16(half)
declare float @llvm.dx.wave.prefix.product.f32(float)
declare double @llvm.dx.wave.prefix.product.f64(double)
declare i16 @llvm.dx.wave.prefix.product.i16(i16)
declare i32 @llvm.dx.wave.prefix.product.i32(i32)
declare i64 @llvm.dx.wave.prefix.product.i64(i64)
declare i16 @llvm.dx.wave.prefix.uproduct.i16(i16)
declare i32 @llvm.dx.wave.prefix.uproduct.i32(i32)
declare i64 @llvm.dx.wave.prefix.uproduct.i64(i64)
; Test that for vector values, WavePrefixProduct scalarizes and maps down to the
; DirectX op
define noundef <2 x half> @wave_prefix_product_v2half(<2 x half> noundef %expr) {
entry:
; CHECK: call half @dx.op.wavePrefixOp.f16(i32 121, half %expr.i0, i8 1, i8 0)
; CHECK: call half @dx.op.wavePrefixOp.f16(i32 121, half %expr.i1, i8 1, i8 0)
%ret = call <2 x half> @llvm.dx.wave.prefix.product.v2f16(<2 x half> %expr)
ret <2 x half> %ret
}
define noundef <3 x i32> @wave_prefix_product_v3i32(<3 x i32> noundef %expr) {
entry:
; CHECK: call i32 @dx.op.wavePrefixOp.i32(i32 121, i32 %expr.i0, i8 1, i8 0)
; CHECK: call i32 @dx.op.wavePrefixOp.i32(i32 121, i32 %expr.i1, i8 1, i8 0)
; CHECK: call i32 @dx.op.wavePrefixOp.i32(i32 121, i32 %expr.i2, i8 1, i8 0)
%ret = call <3 x i32> @llvm.dx.wave.prefix.product.v3i32(<3 x i32> %expr)
ret <3 x i32> %ret
}
define noundef <4 x double> @wave_prefix_product_v4f64(<4 x double> noundef %expr) {
entry:
; CHECK: call double @dx.op.wavePrefixOp.f64(i32 121, double %expr.i0, i8 1, i8 0)
; CHECK: call double @dx.op.wavePrefixOp.f64(i32 121, double %expr.i1, i8 1, i8 0)
; CHECK: call double @dx.op.wavePrefixOp.f64(i32 121, double %expr.i2, i8 1, i8 0)
; CHECK: call double @dx.op.wavePrefixOp.f64(i32 121, double %expr.i3, i8 1, i8 0)
%ret = call <4 x double> @llvm.dx.wave.prefix.product.v464(<4 x double> %expr)
ret <4 x double> %ret
}
declare <2 x half> @llvm.dx.wave.prefix.product.v2f16(<2 x half>)
declare <3 x i32> @llvm.dx.wave.prefix.product.v3i32(<3 x i32>)
declare <4 x double> @llvm.dx.wave.prefix.product.v4f64(<4 x double>)
define noundef <2 x i16> @wave_prefix_uproduct_v2i16(<2 x i16> noundef %expr) {
entry:
; CHECK: call i16 @dx.op.wavePrefixOp.i16(i32 121, i16 %expr.i0, i8 1, i8 1)
; CHECK: call i16 @dx.op.wavePrefixOp.i16(i32 121, i16 %expr.i1, i8 1, i8 1)
%ret = call <2 x i16> @llvm.dx.wave.prefix.uproduct.v2f16(<2 x i16> %expr)
ret <2 x i16> %ret
}
define noundef <3 x i32> @wave_prefix_uproduct_v3i32(<3 x i32> noundef %expr) {
entry:
; CHECK: call i32 @dx.op.wavePrefixOp.i32(i32 121, i32 %expr.i0, i8 1, i8 1)
; CHECK: call i32 @dx.op.wavePrefixOp.i32(i32 121, i32 %expr.i1, i8 1, i8 1)
; CHECK: call i32 @dx.op.wavePrefixOp.i32(i32 121, i32 %expr.i2, i8 1, i8 1)
%ret = call <3 x i32> @llvm.dx.wave.prefix.uproduct.v3i32(<3 x i32> %expr)
ret <3 x i32> %ret
}
define noundef <4 x i64> @wave_prefix_uproduct_v4f64(<4 x i64> noundef %expr) {
entry:
; CHECK: call i64 @dx.op.wavePrefixOp.i64(i32 121, i64 %expr.i0, i8 1, i8 1)
; CHECK: call i64 @dx.op.wavePrefixOp.i64(i32 121, i64 %expr.i1, i8 1, i8 1)
; CHECK: call i64 @dx.op.wavePrefixOp.i64(i32 121, i64 %expr.i2, i8 1, i8 1)
; CHECK: call i64 @dx.op.wavePrefixOp.i64(i32 121, i64 %expr.i3, i8 1, i8 1)
%ret = call <4 x i64> @llvm.dx.wave.prefix.uproduct.v464(<4 x i64> %expr)
ret <4 x i64> %ret
}
declare <2 x i16> @llvm.dx.wave.prefix.uproduct.v2f16(<2 x i16>)
declare <3 x i32> @llvm.dx.wave.prefix.uproduct.v3i32(<3 x i32>)
declare <4 x i64> @llvm.dx.wave.prefix.uproduct.v4f64(<4 x i64>)
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