f7a48fbefa
This commit adds support for lwat/ldat atomic operations with function code 16 (Compare and Swap Not Equal) via 4 clang builtins: __builtin_amo_lwat_csne for 32-bit unsigned operations __builtin_amo_ldat_csne for 64-bit unsigned operations __builtin_amo_lwat_csne_s for 32-bit signed operations __builtin_amo_ldat_csne_s for 64-bit signed operations
203 lines
6.4 KiB
LLVM
203 lines
6.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
|
|
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
|
|
; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names < %s \
|
|
; RUN: | FileCheck %s
|
|
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix \
|
|
; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names < %s \
|
|
; RUN: | FileCheck %s --check-prefix=CHECK-BE
|
|
|
|
define void @test_lwat(ptr noundef %ptr, i32 noundef %value, ptr nocapture %resp) {
|
|
; CHECK-LABEL: test_lwat:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: mr r7, r4
|
|
; CHECK-NEXT: lwat r6, r3, 0
|
|
; CHECK-NEXT: stw r6, 0(r5)
|
|
; CHECK-NEXT: blr
|
|
;
|
|
; CHECK-BE-LABEL: test_lwat:
|
|
; CHECK-BE: # %bb.0: # %entry
|
|
; CHECK-BE-NEXT: mr r7, r4
|
|
; CHECK-BE-NEXT: lwat r6, r3, 0
|
|
; CHECK-BE-NEXT: stw r6, 0(r5)
|
|
; CHECK-BE-NEXT: blr
|
|
entry:
|
|
%0 = tail call i32 @llvm.ppc.amo.lwat(ptr %ptr, i32 %value, i32 0)
|
|
store i32 %0, ptr %resp, align 4
|
|
ret void
|
|
}
|
|
|
|
define void @test_ldat(ptr noundef %ptr, i64 noundef %value, ptr nocapture %resp) {
|
|
; CHECK-LABEL: test_ldat:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: mr r7, r4
|
|
; CHECK-NEXT: ldat r6, r3, 0
|
|
; CHECK-NEXT: std r6, 0(r5)
|
|
; CHECK-NEXT: blr
|
|
;
|
|
; CHECK-BE-LABEL: test_ldat:
|
|
; CHECK-BE: # %bb.0: # %entry
|
|
; CHECK-BE-NEXT: mr r7, r4
|
|
; CHECK-BE-NEXT: ldat r6, r3, 0
|
|
; CHECK-BE-NEXT: std r6, 0(r5)
|
|
; CHECK-BE-NEXT: blr
|
|
entry:
|
|
%0 = tail call i64 @llvm.ppc.amo.ldat(ptr %ptr, i64 %value, i32 0)
|
|
store i64 %0, ptr %resp, align 8
|
|
ret void
|
|
}
|
|
|
|
define void @test_lwat_cond(ptr noundef %ptr, ptr nocapture %resp) {
|
|
; CHECK-LABEL: test_lwat_cond:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: lwat r6, r3, 24
|
|
; CHECK-NEXT: stw r6, 0(r4)
|
|
; CHECK-NEXT: blr
|
|
;
|
|
; CHECK-BE-LABEL: test_lwat_cond:
|
|
; CHECK-BE: # %bb.0: # %entry
|
|
; CHECK-BE-NEXT: lwat r6, r3, 24
|
|
; CHECK-BE-NEXT: stw r6, 0(r4)
|
|
; CHECK-BE-NEXT: blr
|
|
entry:
|
|
%0 = tail call i32 @llvm.ppc.amo.lwat.cond(ptr %ptr, i32 24)
|
|
store i32 %0, ptr %resp, align 4
|
|
ret void
|
|
}
|
|
|
|
define void @test_ldat_cond(ptr noundef %ptr, ptr nocapture %resp) {
|
|
; CHECK-LABEL: test_ldat_cond:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: ldat r6, r3, 24
|
|
; CHECK-NEXT: std r6, 0(r4)
|
|
; CHECK-NEXT: blr
|
|
;
|
|
; CHECK-BE-LABEL: test_ldat_cond:
|
|
; CHECK-BE: # %bb.0: # %entry
|
|
; CHECK-BE-NEXT: ldat r6, r3, 24
|
|
; CHECK-BE-NEXT: std r6, 0(r4)
|
|
; CHECK-BE-NEXT: blr
|
|
entry:
|
|
%0 = tail call i64 @llvm.ppc.amo.ldat.cond(ptr %ptr, i32 24)
|
|
store i64 %0, ptr %resp, align 8
|
|
ret void
|
|
}
|
|
|
|
define void @test_stwat(ptr noundef %ptr, i32 noundef %value) {
|
|
; CHECK-LABEL: test_stwat:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: stwat r4, r3, 0
|
|
; CHECK-NEXT: blr
|
|
;
|
|
; CHECK-BE-LABEL: test_stwat:
|
|
; CHECK-BE: # %bb.0: # %entry
|
|
; CHECK-BE-NEXT: stwat r4, r3, 0
|
|
; CHECK-BE-NEXT: blr
|
|
entry:
|
|
tail call void @llvm.ppc.amo.stwat(ptr %ptr, i32 %value, i32 0)
|
|
ret void
|
|
}
|
|
|
|
define void @test_stdat(ptr noundef %ptr, i64 noundef %value) {
|
|
; CHECK-LABEL: test_stdat:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: stdat r4, r3, 0
|
|
; CHECK-NEXT: blr
|
|
;
|
|
; CHECK-BE-LABEL: test_stdat:
|
|
; CHECK-BE: # %bb.0: # %entry
|
|
; CHECK-BE-NEXT: stdat r4, r3, 0
|
|
; CHECK-BE-NEXT: blr
|
|
entry:
|
|
tail call void @llvm.ppc.amo.stdat(ptr %ptr, i64 %value, i32 0)
|
|
ret void
|
|
}
|
|
|
|
define void @test_lwat_csne(ptr noundef %ptr, i32 noundef %value1, i32 noundef %value2, ptr nocapture %resp) nounwind {
|
|
; CHECK-LABEL: test_lwat_csne:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: mflr r0
|
|
; CHECK-NEXT: std r30, -16(r1) # 8-byte Folded Spill
|
|
; CHECK-NEXT: stdu r1, -48(r1)
|
|
; CHECK-NEXT: mr r30, r6
|
|
; CHECK-NEXT: clrldi r4, r4, 32
|
|
; CHECK-NEXT: clrldi r5, r5, 32
|
|
; CHECK-NEXT: mr r6, r3
|
|
; CHECK-NEXT: std r0, 64(r1)
|
|
; CHECK-NEXT: lwat r3, r6, 16
|
|
; CHECK-NEXT: stw r3, 0(r30)
|
|
; CHECK-NEXT: addi r1, r1, 48
|
|
; CHECK-NEXT: ld r0, 16(r1)
|
|
; CHECK-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
|
|
; CHECK-NEXT: mtlr r0
|
|
; CHECK-NEXT: blr
|
|
;
|
|
; CHECK-BE-LABEL: test_lwat_csne:
|
|
; CHECK-BE: # %bb.0: # %entry
|
|
; CHECK-BE-NEXT: mflr r0
|
|
; CHECK-BE-NEXT: stdu r1, -128(r1)
|
|
; CHECK-BE-NEXT: std r0, 144(r1)
|
|
; CHECK-BE-NEXT: std r31, 120(r1) # 8-byte Folded Spill
|
|
; CHECK-BE-NEXT: mr r31, r6
|
|
; CHECK-BE-NEXT: mr r6, r3
|
|
; CHECK-BE-NEXT: clrldi r4, r4, 32
|
|
; CHECK-BE-NEXT: clrldi r5, r5, 32
|
|
; CHECK-BE-NEXT: lwat r3, r6, 16
|
|
; CHECK-BE-NEXT: stw r3, 0(r31)
|
|
; CHECK-BE-NEXT: ld r31, 120(r1) # 8-byte Folded Reload
|
|
; CHECK-BE-NEXT: addi r1, r1, 128
|
|
; CHECK-BE-NEXT: ld r0, 16(r1)
|
|
; CHECK-BE-NEXT: mtlr r0
|
|
; CHECK-BE-NEXT: blr
|
|
entry:
|
|
%0 = tail call i32 @llvm.ppc.amo.lwat.csne(ptr %ptr, i32 %value1, i32 %value2)
|
|
store i32 %0, ptr %resp, align 4
|
|
ret void
|
|
}
|
|
|
|
define void @test_ldat_csne(ptr noundef %ptr, i64 noundef %value1, i64 noundef %value2, ptr nocapture %resp) nounwind {
|
|
; CHECK-LABEL: test_ldat_csne:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: mflr r0
|
|
; CHECK-NEXT: std r30, -16(r1) # 8-byte Folded Spill
|
|
; CHECK-NEXT: stdu r1, -48(r1)
|
|
; CHECK-NEXT: mr r30, r6
|
|
; CHECK-NEXT: mr r6, r3
|
|
; CHECK-NEXT: std r0, 64(r1)
|
|
; CHECK-NEXT: ldat r3, r6, 16
|
|
; CHECK-NEXT: std r3, 0(r30)
|
|
; CHECK-NEXT: addi r1, r1, 48
|
|
; CHECK-NEXT: ld r0, 16(r1)
|
|
; CHECK-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
|
|
; CHECK-NEXT: mtlr r0
|
|
; CHECK-NEXT: blr
|
|
;
|
|
; CHECK-BE-LABEL: test_ldat_csne:
|
|
; CHECK-BE: # %bb.0: # %entry
|
|
; CHECK-BE-NEXT: mflr r0
|
|
; CHECK-BE-NEXT: stdu r1, -128(r1)
|
|
; CHECK-BE-NEXT: std r0, 144(r1)
|
|
; CHECK-BE-NEXT: std r31, 120(r1) # 8-byte Folded Spill
|
|
; CHECK-BE-NEXT: mr r31, r6
|
|
; CHECK-BE-NEXT: mr r6, r3
|
|
; CHECK-BE-NEXT: ldat r3, r6, 16
|
|
; CHECK-BE-NEXT: std r3, 0(r31)
|
|
; CHECK-BE-NEXT: ld r31, 120(r1) # 8-byte Folded Reload
|
|
; CHECK-BE-NEXT: addi r1, r1, 128
|
|
; CHECK-BE-NEXT: ld r0, 16(r1)
|
|
; CHECK-BE-NEXT: mtlr r0
|
|
; CHECK-BE-NEXT: blr
|
|
entry:
|
|
%0 = tail call i64 @llvm.ppc.amo.ldat.csne(ptr %ptr, i64 %value1, i64 %value2)
|
|
store i64 %0, ptr %resp, align 8
|
|
ret void
|
|
}
|
|
|
|
declare i64 @llvm.ppc.amo.ldat(ptr, i64, i32 immarg)
|
|
declare i32 @llvm.ppc.amo.lwat(ptr, i32, i32 immarg)
|
|
declare i64 @llvm.ppc.amo.ldat.cond(ptr, i32 immarg)
|
|
declare i32 @llvm.ppc.amo.lwat.cond(ptr, i32 immarg)
|
|
declare void @llvm.ppc.amo.stwat(ptr, i32, i32 immarg)
|
|
declare void @llvm.ppc.amo.stdat(ptr, i64, i32 immarg)
|
|
declare i64 @llvm.ppc.amo.ldat.csne(ptr, i64, i64)
|
|
declare i32 @llvm.ppc.amo.lwat.csne(ptr, i32, i32)
|