In review of bbde6b, I had originally proposed that we support the legacy text format. As review evolved, it bacame clear this had been a bad idea (too much complexity), but in order to let that patch finally move forward, I approved the change with the variant. This change undoes the variant, and updates all the tests to just use the array form.
179 lines
6.2 KiB
YAML
179 lines
6.2 KiB
YAML
# RUN: llc -run-pass register-coalescer %s -o - | FileCheck %s
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--- |
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target datalayout = "e-m:e-i64:64-n32:64"
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target triple = "powerpc64le-unknown-linux-gnu"
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@b = common dso_local local_unnamed_addr global i32 0, align 4
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@d = common dso_local local_unnamed_addr global i32 0, align 4
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@e = common dso_local local_unnamed_addr global ptr null, align 8
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@c = common dso_local local_unnamed_addr global i32 0, align 4
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@a = common dso_local local_unnamed_addr global [1 x i32] zeroinitializer, align 4
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; Function Attrs: norecurse nounwind
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define dso_local signext i32 @copycrunset() local_unnamed_addr #0 {
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entry:
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%0 = load i32, ptr @b, align 4
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%tobool3 = icmp eq i32 %0, 0
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br i1 %tobool3, label %while.end, label %while.body.preheader
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while.body.preheader: ; preds = %entry
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%.pre = load i32, ptr @d, align 4
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%tobool1 = icmp eq i32 %.pre, 0
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br label %while.body
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while.body: ; preds = %land.end, %while.body.preheader
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br i1 %tobool1, label %land.end, label %land.rhs
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land.rhs: ; preds = %while.body
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%1 = load ptr, ptr @e, align 8
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%2 = load i32, ptr %1, align 4
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%idxprom = sext i32 %2 to i64
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%arrayidx = getelementptr inbounds [1 x i32], ptr @a, i64 0, i64 %idxprom
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%3 = load i32, ptr %arrayidx, align 4
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%tobool2 = icmp ne i32 %3, 0
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br label %land.end
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land.end: ; preds = %land.rhs, %while.body
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%4 = phi i1 [ false, %while.body ], [ %tobool2, %land.rhs ]
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%land.ext = zext i1 %4 to i32
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store i32 %land.ext, ptr @c, align 4
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br label %while.body
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while.end: ; preds = %entry
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ret i32 undef
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}
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...
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---
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name: copycrunset
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alignment: 16
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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failedISel: false
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tracksRegLiveness: true
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hasWinCFI: false
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registers:
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- { id: 0, class: crbitrc, preferred-register: '' }
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- { id: 1, class: crbitrc, preferred-register: '' }
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- { id: 2, class: crbitrc, preferred-register: '' }
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- { id: 3, class: g8rc_and_g8rc_nox0, preferred-register: '' }
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- { id: 4, class: gprc, preferred-register: '' }
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- { id: 5, class: crrc, preferred-register: '' }
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- { id: 6, class: g8rc_and_g8rc_nox0, preferred-register: '' }
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- { id: 7, class: gprc, preferred-register: '' }
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- { id: 8, class: crrc, preferred-register: '' }
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- { id: 9, class: crbitrc, preferred-register: '' }
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- { id: 10, class: g8rc_and_g8rc_nox0, preferred-register: '' }
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- { id: 11, class: g8rc_and_g8rc_nox0, preferred-register: '' }
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- { id: 12, class: g8rc, preferred-register: '' }
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- { id: 13, class: g8rc_and_g8rc_nox0, preferred-register: '' }
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- { id: 14, class: g8rc_and_g8rc_nox0, preferred-register: '' }
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- { id: 15, class: g8rc, preferred-register: '' }
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- { id: 16, class: gprc, preferred-register: '' }
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- { id: 17, class: crrc, preferred-register: '' }
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- { id: 18, class: crbitrc, preferred-register: '' }
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- { id: 19, class: gprc_and_gprc_nor0, preferred-register: '' }
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- { id: 20, class: gprc_and_gprc_nor0, preferred-register: '' }
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- { id: 21, class: gprc, preferred-register: '' }
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- { id: 22, class: g8rc_and_g8rc_nox0, preferred-register: '' }
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- { id: 23, class: g8rc, preferred-register: '' }
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- { id: 24, class: crbitrc, preferred-register: '' }
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liveins:
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- { reg: '$x2', virtual-reg: '' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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stackProtector: ''
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maxCallFrameSize: 4294967295
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cvBytesOfCalleeSavedRegisters: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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localFrameSize: 0
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savePoint: []
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restorePoint: []
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fixedStack: []
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stack: []
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constants: []
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machineFunctionInfo: {}
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body: |
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bb.0.entry:
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successors: %bb.5(0x30000000), %bb.1(0x50000000)
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liveins: $x2
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%3:g8rc_and_g8rc_nox0 = ADDIStocHA8 $x2, @b
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%4:gprc = LWZ target-flags(ppc-toc-lo) @b, killed %3, implicit $x2 :: (dereferenceable load (s32) from @b)
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%5:crrc = CMPLWI killed %4, 0
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BCC 76, killed %5, %bb.5
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B %bb.1
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bb.1.while.body.preheader:
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successors: %bb.2(0x80000000)
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liveins: $x2
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%6:g8rc_and_g8rc_nox0 = ADDIStocHA8 $x2, @d
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%7:gprc = LWZ target-flags(ppc-toc-lo) @d, killed %6, implicit $x2 :: (dereferenceable load (s32) from @d)
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%8:crrc = CMPWI killed %7, 0
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%0:crbitrc = COPY killed %8.sub_eq
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%9:crbitrc = CRUNSET
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%19:gprc_and_gprc_nor0 = LI 0
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%20:gprc_and_gprc_nor0 = LI 1
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%22:g8rc_and_g8rc_nox0 = ADDIStocHA8 $x2, @c
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%10:g8rc_and_g8rc_nox0 = ADDIStocHA8 $x2, @e
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%13:g8rc_and_g8rc_nox0 = ADDIStocHA8 $x2, @a
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%14:g8rc_and_g8rc_nox0 = ADDItocL8 killed %13, @a, implicit $x2
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bb.2.while.body:
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successors: %bb.4(0x30000000), %bb.3(0x50000000)
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liveins: $x2
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%24:crbitrc = COPY %9
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BC %0, %bb.4
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B %bb.3
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bb.3.land.rhs:
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successors: %bb.4(0x80000000)
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liveins: $x2
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%11:g8rc_and_g8rc_nox0 = LD target-flags(ppc-toc-lo) @e, %10, implicit $x2 :: (dereferenceable load (s64) from @e)
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%12:g8rc = LWA 0, killed %11 :: (load (s32) from %ir.1)
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%15:g8rc = RLDICR killed %12, 2, 61
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%16:gprc = LWZX %14, killed %15 :: (load (s32) from %ir.arrayidx)
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%17:crrc = CMPWI killed %16, 0
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%18:crbitrc = COPY killed %17.sub_eq
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%1:crbitrc = CRNOR killed %18, %18
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%24:crbitrc = COPY killed %1
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bb.4.land.end:
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successors: %bb.2(0x80000000)
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liveins: $x2
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%2:crbitrc = COPY killed %24
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%21:gprc = ISEL %20, %19, killed %2
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STW killed %21, target-flags(ppc-toc-lo) @c, %22, implicit $x2 :: (store (s32) into @c)
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B %bb.2
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bb.5.while.end:
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%23:g8rc = LI8 0
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$x3 = COPY killed %23
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BLR8 implicit $lr8, implicit $rm, implicit killed $x3
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...
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#Copy of CRUNSET should be removed in register coalescing pass
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#CHECK-LABEL: copycrunset
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#CHECK: bb.1.while.body.preheader:
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#CHECK-NOT: %9:crbitrc = CRUNSET
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#CHECK: bb.2.while.body:
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#CHECK-NOT: %24:crbitrc = COPY %9
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#CHECK: %24:crbitrc = CRUNSET
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#CHECK: B %bb.3
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