09f9a2892a
Support COPYs involving higher FP16 regs (like F24H) with a new pseudo instruction 'VLR16'. This is needed with -O0/regalloc=fast, and probably in more cases as well. Fixes #178788.
36 lines
1.1 KiB
LLVM
36 lines
1.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z16 -regalloc=fast -verify-machineinstrs \
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; RUN: | FileCheck %s
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; Test COPY to $f0 from $f24.
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define half @fun0(<4 x half> %0) {
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; CHECK-LABEL: fun0:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vlr %v0, %v24
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; CHECK-NEXT: br %r14
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entry:
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%Res = extractelement <4 x half> %0, i32 0
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ret half %Res
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}
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; Test COPY from $f0 to $f24.
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define <4 x half> @fun1(half %0) {
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; CHECK-LABEL: fun1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: stmg %r14, %r15, 112(%r15)
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; CHECK-NEXT: .cfi_offset %r14, -48
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; CHECK-NEXT: .cfi_offset %r15, -40
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; CHECK-NEXT: aghi %r15, -160
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; CHECK-NEXT: .cfi_def_cfa_offset 320
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; CHECK-NEXT: brasl %r14, __extendhfsf2@PLT
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; CHECK-NEXT: aebr %f0, %f0
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; CHECK-NEXT: brasl %r14, __truncsfhf2@PLT
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; CHECK-NEXT: vlr %v24, %v0
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; CHECK-NEXT: lmg %r14, %r15, 272(%r15)
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; CHECK-NEXT: br %r14
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entry:
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%Add = fadd half %0, %0
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%Res = insertelement <4 x half> poison, half %Add, i32 0
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ret <4 x half> %Res
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}
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