18d85a33cc
Set the correct memory ordering for relaxed atomics after ISel. This allows SelectionDAG to keep the simple generic selection for target-independent AtomicLoad nodes, but keeps the ordering immediate correct in the MIR. Notably, the MachineMemOperand still has the original memory ordering and MIR passes would use that rather than the ordering immedate to make their code motion decisions (if we had any for Wasm, which we don't).
144 lines
4.7 KiB
LLVM
144 lines
4.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc < %s --mtriple=wasm32 | FileCheck %s --check-prefixes=NO-ATOMICS
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; RUN: llc < %s --mtriple=wasm32 -mattr=+atomics | FileCheck %s --check-prefixes=ATOMICS
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; RUN: llc < %s --mtriple=wasm32 -mattr=+atomics,+relaxed-atomics | FileCheck %s --check-prefixes=RELAXED32
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; RUN: llc < %s --mtriple=wasm64 -mattr=+atomics,+relaxed-atomics | FileCheck %s --check-prefixes=RELAXED64
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; A multithread fence is lowered to an atomic.fence instruction.
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define void @fence_acquire() {
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; NO-ATOMICS-LABEL: fence_acquire:
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; NO-ATOMICS: .functype fence_acquire () -> ()
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; NO-ATOMICS-NEXT: # %bb.0:
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; NO-ATOMICS-NEXT: # fallthrough-return
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;
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; ATOMICS-LABEL: fence_acquire:
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; ATOMICS: .functype fence_acquire () -> ()
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; ATOMICS-NEXT: # %bb.0:
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; ATOMICS-NEXT: atomic.fence
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; ATOMICS-NEXT: # fallthrough-return
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;
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; RELAXED32-LABEL: fence_acquire:
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; RELAXED32: .functype fence_acquire () -> ()
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; RELAXED32-NEXT: # %bb.0:
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; RELAXED32-NEXT: atomic.fence acqrel
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; RELAXED32-NEXT: # fallthrough-return
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;
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; RELAXED64-LABEL: fence_acquire:
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; RELAXED64: .functype fence_acquire () -> ()
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; RELAXED64-NEXT: # %bb.0:
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; RELAXED64-NEXT: atomic.fence acqrel
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; RELAXED64-NEXT: # fallthrough-return
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fence acquire
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ret void
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}
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define void @fence_release() {
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; NO-ATOMICS-LABEL: fence_release:
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; NO-ATOMICS: .functype fence_release () -> ()
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; NO-ATOMICS-NEXT: # %bb.0:
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; NO-ATOMICS-NEXT: # fallthrough-return
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;
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; ATOMICS-LABEL: fence_release:
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; ATOMICS: .functype fence_release () -> ()
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; ATOMICS-NEXT: # %bb.0:
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; ATOMICS-NEXT: atomic.fence
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; ATOMICS-NEXT: # fallthrough-return
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;
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; RELAXED32-LABEL: fence_release:
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; RELAXED32: .functype fence_release () -> ()
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; RELAXED32-NEXT: # %bb.0:
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; RELAXED32-NEXT: atomic.fence acqrel
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; RELAXED32-NEXT: # fallthrough-return
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;
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; RELAXED64-LABEL: fence_release:
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; RELAXED64: .functype fence_release () -> ()
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; RELAXED64-NEXT: # %bb.0:
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; RELAXED64-NEXT: atomic.fence acqrel
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; RELAXED64-NEXT: # fallthrough-return
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fence release
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ret void
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}
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define void @fence_acq_rel() {
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; NO-ATOMICS-LABEL: fence_acq_rel:
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; NO-ATOMICS: .functype fence_acq_rel () -> ()
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; NO-ATOMICS-NEXT: # %bb.0:
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; NO-ATOMICS-NEXT: # fallthrough-return
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;
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; ATOMICS-LABEL: fence_acq_rel:
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; ATOMICS: .functype fence_acq_rel () -> ()
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; ATOMICS-NEXT: # %bb.0:
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; ATOMICS-NEXT: atomic.fence
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; ATOMICS-NEXT: # fallthrough-return
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;
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; RELAXED32-LABEL: fence_acq_rel:
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; RELAXED32: .functype fence_acq_rel () -> ()
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; RELAXED32-NEXT: # %bb.0:
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; RELAXED32-NEXT: atomic.fence acqrel
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; RELAXED32-NEXT: # fallthrough-return
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;
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; RELAXED64-LABEL: fence_acq_rel:
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; RELAXED64: .functype fence_acq_rel () -> ()
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; RELAXED64-NEXT: # %bb.0:
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; RELAXED64-NEXT: atomic.fence acqrel
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; RELAXED64-NEXT: # fallthrough-return
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fence acq_rel
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ret void
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}
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define void @fence_seq_cst() {
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; NO-ATOMICS-LABEL: fence_seq_cst:
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; NO-ATOMICS: .functype fence_seq_cst () -> ()
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; NO-ATOMICS-NEXT: # %bb.0:
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; NO-ATOMICS-NEXT: # fallthrough-return
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;
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; ATOMICS-LABEL: fence_seq_cst:
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; ATOMICS: .functype fence_seq_cst () -> ()
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; ATOMICS-NEXT: # %bb.0:
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; ATOMICS-NEXT: atomic.fence
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; ATOMICS-NEXT: # fallthrough-return
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;
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; RELAXED32-LABEL: fence_seq_cst:
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; RELAXED32: .functype fence_seq_cst () -> ()
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; RELAXED32-NEXT: # %bb.0:
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; RELAXED32-NEXT: atomic.fence seqcst
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; RELAXED32-NEXT: # fallthrough-return
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;
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; RELAXED64-LABEL: fence_seq_cst:
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; RELAXED64: .functype fence_seq_cst () -> ()
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; RELAXED64-NEXT: # %bb.0:
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; RELAXED64-NEXT: atomic.fence seqcst
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; RELAXED64-NEXT: # fallthrough-return
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fence seq_cst
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ret void
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}
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; A singlethread fence becomes compiler_fence instruction, a pseudo instruction
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; that acts as a compiler barrier. The barrier should not be emitted to .s file.
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define void @singlethread_fence() {
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; NO-ATOMICS-LABEL: singlethread_fence:
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; NO-ATOMICS: .functype singlethread_fence () -> ()
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; NO-ATOMICS-NEXT: # %bb.0:
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; NO-ATOMICS-NEXT: # fallthrough-return
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;
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; ATOMICS-LABEL: singlethread_fence:
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; ATOMICS: .functype singlethread_fence () -> ()
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; ATOMICS-NEXT: # %bb.0:
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; ATOMICS-NEXT: # fallthrough-return
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;
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; RELAXED32-LABEL: singlethread_fence:
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; RELAXED32: .functype singlethread_fence () -> ()
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; RELAXED32-NEXT: # %bb.0:
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; RELAXED32-NEXT: # fallthrough-return
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;
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; RELAXED64-LABEL: singlethread_fence:
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; RELAXED64: .functype singlethread_fence () -> ()
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; RELAXED64-NEXT: # %bb.0:
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; RELAXED64-NEXT: # fallthrough-return
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fence syncscope("singlethread") seq_cst
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fence syncscope("singlethread") acquire
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fence syncscope("singlethread") release
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fence syncscope("singlethread") acq_rel
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ret void
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}
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