a55fbab0cf
In some cases, LV gets simplifyable IR as input. Directly apply simplifications on the initial VPlan0 to avoid vectorization in cases where the loop body can be folded away. Using the end-to-end pipeline, this is relatively rare, but when reducing test cases, the reduction often ends up with cases with trivial folds. Rejecting those will result in more robust & realistic test cases. As follow-up, I also plan to add initial dead recipe removal. Depends on https://github.com/llvm/llvm-project/pull/176795. PR: https://github.com/llvm/llvm-project/pull/176828
53 lines
2.3 KiB
LLVM
53 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 5
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; RUN: opt -passes=loop-vectorize -S %s | FileCheck %s
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target triple = "x86_64"
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define void @pr141968(i1 %cond, i8 %v, ptr %p) {
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; CHECK-LABEL: define void @pr141968(
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; CHECK-SAME: i1 [[COND:%.*]], i8 [[V:%.*]], ptr [[P:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: [[ZEXT_TRUE:%.*]] = zext i1 true to i16
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; CHECK-NEXT: [[SEXT:%.*]] = sext i8 [[V]] to i16
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; CHECK-NEXT: br label %[[PRED_SDIV_CONTINUE28:.*]]
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; CHECK: [[PRED_SDIV_CONTINUE28]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i8 [ [[IV_NEXT:%.*]], %[[PRED_SDIV_CONTINUE30:.*]] ], [ 0, %[[ENTRY]] ]
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; CHECK-NEXT: br i1 [[COND]], label %[[PRED_SDIV_CONTINUE30]], label %[[PRED_SDIV_IF29:.*]]
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; CHECK: [[PRED_SDIV_IF29]]:
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; CHECK-NEXT: [[SDIV:%.*]] = sdiv i16 [[SEXT]], [[ZEXT_TRUE]]
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; CHECK-NEXT: [[SDIV_TRUNC:%.*]] = trunc i16 [[SDIV]] to i8
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; CHECK-NEXT: br label %[[PRED_SDIV_CONTINUE30]]
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; CHECK: [[PRED_SDIV_CONTINUE30]]:
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; CHECK-NEXT: [[PREDPHI:%.*]] = phi i8 [ [[SDIV_TRUNC]], %[[PRED_SDIV_IF29]] ], [ 0, %[[PRED_SDIV_CONTINUE28]] ]
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; CHECK-NEXT: store i8 [[PREDPHI]], ptr [[P]], align 1
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; CHECK-NEXT: [[IV_NEXT]] = add i8 [[IV]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i8 [[IV_NEXT]], 0
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; CHECK-NEXT: br i1 [[EXITCOND]], label %[[EXIT1:.*]], label %[[PRED_SDIV_CONTINUE28]]
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; CHECK: [[EXIT1]]:
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; CHECK-NEXT: ret void
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;
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entry:
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%zext.true = zext i1 true to i16
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%sext = sext i8 %v to i16
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br label %loop.header
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loop.header: ; preds = %loop.latch, %entry
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%iv = phi i8 [ %iv.next, %loop.latch ], [ 0, %entry ]
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br i1 %cond, label %loop.latch, label %cond.false
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cond.false: ; preds = %loop.header
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%sdiv = sdiv i16 %sext, %zext.true
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%sdiv.trunc = trunc i16 %sdiv to i8
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br label %loop.latch
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loop.latch: ; preds = %cond.false, %loop.header
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%ret = phi i8 [ %sdiv.trunc, %cond.false ], [ 0, %loop.header ]
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store i8 %ret, ptr %p, align 1
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%iv.next = add i8 %iv, 1
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%exitcond = icmp eq i8 %iv.next, 0
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br i1 %exitcond, label %exit, label %loop.header
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exit: ; preds = %loop.latch
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ret void
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}
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