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llvm-project/llvm/test/Transforms/SLPVectorizer/reduced-gathered-vectorized.ll
Alexey Bataev abdcde9bbc
[SLP] Loop aware cost model/tree building 
Currently, SLP vectorizer do not care about loops and their trip count.
It may lead to inefficient vectorization in some cases. Patch adds loop
nest-aware tree building and cost estimation.
When it comes to tree building, it now checks that tree do not span
across different loop nests. The nodes from other loop nests are
immediate buildvector nodes.
The cost model adds the knowledge about loop trip count. If it is
unknown, the default value is used, controlled by the
-slp-cost-loop-min-trip-count=<value> option. The cost of the vector
nodes in the loop is multiplied by the number of iteration (trip count),
because each vector node will be executed the trip count number of
times. This allows better cost estimation.

Original Reviewers:
jdenny-ornl, vporpo, hiraditya, RKSimon

Original PR: https://github.com/llvm/llvm-project/pull/150450

Recommit after revert in c7bd3062f1dac975cf9b706f457b3c55b4bf57ff and in 4e500bd0015042b0cd4b7c87b81caeea06072d24

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/187391
2026-03-18 17:54:01 -04:00

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: %if x86-registered-target %{ opt -passes=slp-vectorizer -S -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X86 %}
; RUN: %if aarch64-registered-target %{ opt -passes=slp-vectorizer -S -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck --check-prefix=AARCH64 %s %}
define i16 @test() {
; X86-LABEL: @test(
; X86-NEXT: entry:
; X86-NEXT: [[A:%.*]] = getelementptr [1000 x i64], ptr null, i64 0, i64 5
; X86-NEXT: [[A1:%.*]] = getelementptr [1000 x i64], ptr null, i64 0, i64 6
; X86-NEXT: [[A2:%.*]] = getelementptr [1000 x i64], ptr null, i64 0, i64 7
; X86-NEXT: [[A3:%.*]] = getelementptr [1000 x i64], ptr null, i64 0, i64 8
; X86-NEXT: br label [[WHILE:%.*]]
; X86: while:
; X86-NEXT: [[PH:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[OP_RDX1:%.*]], [[WHILE]] ]
; X86-NEXT: [[TMP0:%.*]] = load i64, ptr null, align 8
; X86-NEXT: [[TMP1:%.*]] = load i64, ptr null, align 8
; X86-NEXT: [[TMP5:%.*]] = load <2 x i64>, ptr [[A2]], align 8
; X86-NEXT: [[TMP3:%.*]] = load <2 x i64>, ptr [[A]], align 8
; X86-NEXT: [[TMP4:%.*]] = shufflevector <2 x i64> [[TMP3]], <2 x i64> poison, <2 x i32> <i32 1, i32 0>
; X86-NEXT: [[TMP8:%.*]] = load <2 x i64>, ptr [[A1]], align 16
; X86-NEXT: [[TMP6:%.*]] = load i64, ptr [[A3]], align 16
; X86-NEXT: [[TMP7:%.*]] = insertelement <8 x i64> poison, i64 [[TMP1]], i32 0
; X86-NEXT: [[TMP12:%.*]] = shufflevector <2 x i64> [[TMP5]], <2 x i64> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
; X86-NEXT: [[TMP9:%.*]] = shufflevector <8 x i64> [[TMP7]], <8 x i64> [[TMP12]], <8 x i32> <i32 0, i32 8, i32 9, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
; X86-NEXT: [[TMP10:%.*]] = insertelement <8 x i64> [[TMP9]], i64 [[TMP0]], i32 3
; X86-NEXT: [[TMP11:%.*]] = shufflevector <2 x i64> [[TMP4]], <2 x i64> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
; X86-NEXT: [[TMP16:%.*]] = shufflevector <8 x i64> [[TMP10]], <8 x i64> [[TMP11]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 6, i32 7>
; X86-NEXT: [[TMP13:%.*]] = shufflevector <2 x i64> [[TMP8]], <2 x i64> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
; X86-NEXT: [[TMP17:%.*]] = shufflevector <8 x i64> [[TMP16]], <8 x i64> [[TMP13]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 9>
; X86-NEXT: [[TMP14:%.*]] = shufflevector <8 x i64> [[TMP17]], <8 x i64> zeroinitializer, <8 x i32> <i32 0, i32 8, i32 8, i32 3, i32 4, i32 5, i32 6, i32 8>
; X86-NEXT: [[TMP15:%.*]] = call i64 @llvm.vector.reduce.xor.v8i64(<8 x i64> [[TMP14]])
; X86-NEXT: [[OP_RDX:%.*]] = xor i64 [[TMP15]], [[TMP6]]
; X86-NEXT: [[OP_RDX1]] = xor i64 [[OP_RDX]], [[TMP6]]
; X86-NEXT: br label [[WHILE]]
;
; AARCH64-LABEL: @test(
; AARCH64-NEXT: entry:
; AARCH64-NEXT: [[A:%.*]] = getelementptr [1000 x i64], ptr null, i64 0, i64 5
; AARCH64-NEXT: [[A1:%.*]] = getelementptr [1000 x i64], ptr null, i64 0, i64 6
; AARCH64-NEXT: [[A2:%.*]] = getelementptr [1000 x i64], ptr null, i64 0, i64 7
; AARCH64-NEXT: [[A3:%.*]] = getelementptr [1000 x i64], ptr null, i64 0, i64 8
; AARCH64-NEXT: br label [[WHILE:%.*]]
; AARCH64: while:
; AARCH64-NEXT: [[PH:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[OP_RDX5:%.*]], [[WHILE]] ]
; AARCH64-NEXT: [[TMP0:%.*]] = load i64, ptr null, align 8
; AARCH64-NEXT: [[TMP2:%.*]] = load i64, ptr null, align 8
; AARCH64-NEXT: [[TMP3:%.*]] = load <2 x i64>, ptr [[A2]], align 8
; AARCH64-NEXT: [[TMP8:%.*]] = load <2 x i64>, ptr [[A]], align 8
; AARCH64-NEXT: [[TMP4:%.*]] = shufflevector <2 x i64> [[TMP8]], <2 x i64> poison, <2 x i32> <i32 1, i32 0>
; AARCH64-NEXT: [[TMP5:%.*]] = load <2 x i64>, ptr [[A1]], align 16
; AARCH64-NEXT: [[TMP6:%.*]] = load i64, ptr [[A3]], align 16
; AARCH64-NEXT: [[TMP7:%.*]] = insertelement <8 x i64> poison, i64 [[TMP2]], i32 0
; AARCH64-NEXT: [[TMP9:%.*]] = shufflevector <2 x i64> [[TMP3]], <2 x i64> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
; AARCH64-NEXT: [[TMP15:%.*]] = shufflevector <8 x i64> [[TMP7]], <8 x i64> [[TMP9]], <8 x i32> <i32 0, i32 8, i32 9, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
; AARCH64-NEXT: [[TMP10:%.*]] = insertelement <8 x i64> [[TMP15]], i64 [[TMP0]], i32 3
; AARCH64-NEXT: [[TMP16:%.*]] = shufflevector <2 x i64> [[TMP4]], <2 x i64> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
; AARCH64-NEXT: [[TMP17:%.*]] = shufflevector <8 x i64> [[TMP10]], <8 x i64> [[TMP16]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 6, i32 7>
; AARCH64-NEXT: [[TMP13:%.*]] = shufflevector <2 x i64> [[TMP5]], <2 x i64> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
; AARCH64-NEXT: [[TMP14:%.*]] = shufflevector <8 x i64> [[TMP17]], <8 x i64> [[TMP13]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 9>
; AARCH64-NEXT: [[TMP11:%.*]] = shufflevector <8 x i64> [[TMP14]], <8 x i64> zeroinitializer, <8 x i32> <i32 0, i32 8, i32 8, i32 3, i32 4, i32 5, i32 6, i32 8>
; AARCH64-NEXT: [[TMP12:%.*]] = call i64 @llvm.vector.reduce.xor.v8i64(<8 x i64> [[TMP11]])
; AARCH64-NEXT: [[OP_RDX:%.*]] = xor i64 [[TMP12]], [[TMP6]]
; AARCH64-NEXT: [[OP_RDX5]] = xor i64 [[OP_RDX]], [[TMP6]]
; AARCH64-NEXT: br label [[WHILE]]
;
entry:
%a = getelementptr [1000 x i64], ptr null, i64 0, i64 5
%a1 = getelementptr [1000 x i64], ptr null, i64 0, i64 6
%a2 = getelementptr [1000 x i64], ptr null, i64 0, i64 7
%a3 = getelementptr [1000 x i64], ptr null, i64 0, i64 8
br label %while
while:
%ph = phi i64 [ 0, %entry ], [ %xor, %while ]
%0 = load i64, ptr null, align 8
%1 = load i64, ptr %a1, align 16
%2 = load i64, ptr %a2, align 8
%3 = load i64, ptr %a3, align 16
%4 = load i64, ptr null, align 8
%5 = load i64, ptr %a, align 8
%6 = load i64, ptr %a1, align 16
%7 = load i64, ptr %a2, align 8
%8 = load i64, ptr %a3, align 16
%9 = xor i64 %0, %1
%10 = xor i64 %9, %2
%11 = xor i64 %10, %3
%12 = xor i64 %11, %4
%13 = xor i64 %12, %0
%14 = xor i64 %13, %1
%15 = xor i64 %14, %2
%16 = xor i64 %15, %3
%17 = xor i64 %16, %4
%18 = xor i64 %17, %0
%19 = xor i64 %18, %1
%20 = xor i64 %19, %2
%21 = xor i64 %20, %3
%22 = xor i64 %21, %4
%23 = xor i64 %22, %5
%24 = xor i64 %23, %6
%25 = xor i64 %24, %2
%26 = xor i64 %25, %3
%27 = xor i64 %26, %4
%28 = xor i64 %27, %5
%29 = xor i64 %28, %6
%30 = xor i64 %29, %7
%31 = xor i64 %30, %8
%32 = xor i64 %31, %4
%33 = xor i64 %32, %5
%34 = xor i64 %33, %6
%35 = xor i64 %34, %7
%xor = xor i64 %35, %8
br label %while
}
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